Issued Patents All Time
Showing 76–93 of 93 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6191988 | Floating bitline timer allowing a shared equalizer DRAM sense amplifier | — | 2001-02-20 |
| 6121078 | Integrated circuit planarization and fill biasing design method | Matthew R. Wordeman | 2000-09-19 |
| 5963489 | Method and apparatus for redundancy word line replacement in a repairable semiconductor memory device | Toshiaki Kirihata, Yohji Watanabe, Hing Wong | 1999-10-05 |
| 5874758 | Buried strap trench cell yielding an extended transistor | — | 1999-02-23 |
| 5821592 | Dynamic random access memory arrays and methods therefor | Heinz Hoenigschmid | 1998-10-13 |
| 5804853 | Stacked electrical device having regions of electrical isolation and electrical connections on a given stack level | John Cronin, Hing Wong | 1998-09-08 |
| 5691946 | Row redundancy block architecture | Toshiaki Kirihata, Hing Wong | 1997-11-25 |
| 5614431 | Method of making buried strap trench cell yielding an extended transistor | — | 1997-03-25 |
| 5610867 | DRAM signal margin test method | Toshiaki Kirihata, Hing Wong | 1997-03-11 |
| 5606188 | Fabrication process and structure for a contacted-body silicon-on-insulator dynamic random access memory | Gary B. Bronner, Jack A. Mandelman | 1997-02-25 |
| 5602051 | Method of making stacked electrical device having regions of electrical isolation and electrical connection on a given stack level | John Cronin, Hing Wong | 1997-02-11 |
| 5559739 | Dynamic random access memory with a simple test arrangement | Toshiaki Kirihata, Hing Wong | 1996-09-24 |
| 5546349 | Exchangeable hierarchical data line structure | Yohji Watanabe | 1996-08-13 |
| 5534732 | Single twist layout and method for paired line conductors of integrated circuits | Jenifer E. Lary, Edmund J. Sprogis | 1996-07-09 |
| 5525531 | SOI DRAM with field-shield isolation | Gary B. Bronner, Jack A. Mandelman | 1996-06-11 |
| 5508219 | SOI DRAM with field-shield isolation and body contact | Gary B. Bronner, Jack A. Mandelman | 1996-04-16 |
| 5360758 | Self-aligned buried strap for trench type DRAM cells | Gary B. Bronner, Donald M. Kenney | 1994-11-01 |
| 4873205 | Method for providing silicide bridge contact between silicon regions separated by a thin dielectric | Dale L. Critchlow, Rick L. Mohler, Wendell P. Noble, Paul C. Parries | 1989-10-10 |