Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7135255 | Layout impact reduction with angled phase shapes | Scott Bukofsky, John K. DeBrosse, Marco Hug, Lars Liebmann, Juergen Preuninger | 2006-11-14 |
| 7093212 | IC design density checking method, system and program product | William DeCamp | 2006-08-15 |
| 6086627 | Method of automated ESD protection level verification | Roy Bass, Daniel Canty Sullivan, Steven H. Voldman | 2000-07-11 |
| 6063132 | Method for verifying design rule checking software | William DeCamp, Laurice Thorsen Earl, Jason S. Minahan, James R. Montstream, Joseph J. Oler, Jr. +1 more | 2000-05-16 |
| 5552996 | Method and system using the design pattern of IC chips in the processing thereof | Cheryl A. Hoffman, Mark A. Lavin, William C. Leipold, Kathleen McGroddy | 1996-09-03 |
| 5134616 | Dynamic RAM with on-chip ECC and optimized bit and word redundancy | John E. Barth, Jr., Charles E. Drake, John A. Fifield, William Paul Hovis, Howard L. Kalter +3 more | 1992-07-28 |
| 4999815 | Low power addressing systems | John E. Barth, Jr., Charles E. Drake, William Paul Hovis, Howard L. Kalter, Gordon A. Kelley, Jr. +2 more | 1991-03-12 |