| 5724295 |
Partitioned dynamic memory allowing substitution of a redundant circuit in any partition and using partial address disablement and disablement override |
Mark A. Beiley, Thomas E. Obremski |
1998-03-03 |
| 5708613 |
High performance redundancy in an integrated memory system |
Francis Creed, Mark A. Beiley, Peter Joel Jenkins |
1998-01-13 |
| 5604755 |
Memory system reset circuit |
Claude L. Bertin, John A. Fifield, Erik L. Hedberg |
1997-02-18 |
| 5535226 |
On-chip ECC status |
John A. Fifield, Richard D. Wheeler, Barry Joe Wolford |
1996-07-09 |
| 5134616 |
Dynamic RAM with on-chip ECC and optimized bit and word redundancy |
John E. Barth, Jr., John A. Fifield, William Paul Hovis, Howard L. Kalter, Scott C. Lewis +3 more |
1992-07-28 |
| 5015880 |
CMOS driver circuit |
Howard L. Kalter, Scott C. Lewis |
1991-05-14 |
| 4999815 |
Low power addressing systems |
John E. Barth, Jr., William Paul Hovis, Howard L. Kalter, Gordon A. Kelley, Jr., Scott C. Lewis +2 more |
1991-03-12 |
