Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7237165 | Method for testing embedded DRAM arrays | Laura S. Chadwick, William R. J. Corbin, Jeffrey H. Dreibelbis, Erik A. Nelson, Toshiharu Saitoh +1 more | 2007-06-26 |
| 7103814 | Testing logic and embedded memory in parallel | William R. J. Corbin, Brian R. Kessler, Erik A. Nelson, Donald L. Wheater | 2006-09-05 |
| 7073100 | Method for testing embedded DRAM arrays | Laura S. Chadwick, William R. J. Corbin, Jeffrey H. Dreibelbis, Erik A. Nelson, Toshiharu Saitoh +1 more | 2006-07-04 |
| 6452848 | Programmable built-in self test (BIST) data generator for semiconductor memory devices | Jeffrey H. Dreibelbis, Peter O. Jakobsen | 2002-09-17 |
| 6388930 | Method and apparatus for ram built-in self test (BIST) address generation using bit-wise masking of counters | — | 2002-05-14 |
| 5724295 | Partitioned dynamic memory allowing substitution of a redundant circuit in any partition and using partial address disablement and disablement override | Mark A. Beiley, Charles E. Drake | 1998-03-03 |