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USPTO Patent Rankings Data through Dec 31, 2025
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Mark A. Beiley — 27 Patents

Intel: 23 patents #1,732 of 30,777Top 6%
IBM: 4 patents #21,783 of 70,183Top 35%
Burlington, VT: #25 of 475 inventorsTop 6%
Vermont: #270 of 4,968 inventorsTop 6%
Overall (All Time): #142,059 of 4,157,543Top 4%
27 Patents All Time
Mark A. Beiley has been granted 27 US patents while listed as an inventor at Intel. The first was granted in 1996 and the most recent in February 2008. Mark A. Beiley ranks #142,059 of 4,157,543 US inventors in our database (top 3.4%). Patent records list Mark A. Beiley in Burlington, VT, US.

Issued Patents All Time

Showing 1–25 of 27 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
7330993 Slew rate control mechanism Mahesh Deshmane, Luke A. Johnson 2008-02-12 $36,180,000
7061224 Test circuit for delay lock loops Akira Kakizawa, Mamun Ur Rashid 2006-06-13 $12,187,000
7024565 Method and apparatus to detect circuit tampering James Breisch 2006-04-04 $11,898,000
6933168 Method and apparatus for employing a light shield to modulate pixel color responsivity Edward J. Bawolek, Lawrence T. Clark 2005-08-23 $20,377,000
6806569 Multi-frequency power delivery system James Breisch 2004-10-19 $58,589,000
6522357 Method and apparatus for increasing retention time in image sensors having an electronic shutter Eric J. Hoffman, Lawrence T. Clark 2003-02-18 $52,625,000
6438276 Imaging system having a sensor array reset noise reduction mechanism Jon M. Dhuse, Kevin M. Connolly 2002-08-20 $43,289,000
6433822 Method and apparatus for self-calibration and fixed-pattern noise removal in imager integrated circuits Lawrence T. Clark, Eric J. Hoffman 2002-08-13 $41,871,000
6410359 Reduced leakage trench isolation Kevin M. Connolly, Jung Kang, Berni W. Landau, James Breisch, Akira Kakizawa +4 more 2002-06-25 $55,737,000
6366320 High speed readout architecture for analog storage arrays Rajendran Nair, Morteza Cyrus Afghahi 2002-04-02 $46,572,000
6362695 Method and apparatus to produce a random bit sequence James Breisch 2002-03-26 $63,938,000
6317154 Method to reduce reset noise in photodiode based CMOS image sensors 2001-11-13 $122,229,000
6243134 Method to reduce reset noise in photodiode based CMOS image sensors 2001-06-05 $206,071,000
6235549 Method and apparatus for employing a light shield to modulate pixel color responsivity Edward J. Bawolek, Lawrence T. Clark 2001-05-22 $176,958,000
6215165 Reduced leakage trench isolation Kevin M. Connolly, Jung Kang, Berni W. Landau, James Breisch, Akira Kakizawa +4 more 2001-04-10 $109,826,000
6157016 Fast CMOS active-pixel sensor array readout circuit with predischarge circuit Lawrence T. Clark 2000-12-05 $234,769,000
6133862 Method and apparatus to reduce row reset noise in photodiode Jon M. Dhuse, Kevin M. Connolly 2000-10-17 $234,968,000
6133563 Sensor cell having a soft saturation circuit Lawrence T. Clark, Eric J. Hoffman 2000-10-17 $234,968,000
6118482 Method and apparatus for electrical test of CMOS pixel sensor arrays Lawrence T. Clark, Eric J. Hoffman 2000-09-12 $304,851,000
6057586 Method and apparatus for employing a light shield to modulate pixel color responsivity Edward J. Bawolek, Lawrence T. Clark 2000-05-02 $469,174,000
6040592 Well to substrate photodiode for use in a CMOS sensor on a salicide process Bart R. McDaniel, Lawrence T. Clark, Eric J. Hoffman, Edward J. Bawolek 2000-03-21 $323,907,000
5987577 Dual word enable method and apparatus for memory arrays Christopher P. Miller 1999-11-16 $28,261,000
5939936 Switchable N-well biasing technique for improved dynamic range and speed performance of analog data bus Lawrence T. Clark, Eric J. Hoffman 1999-08-17 $138,414,000
5859450 Dark current reducing guard ring Lawrence T. Clark 1999-01-12 $79,273,000
5724295 Partitioned dynamic memory allowing substitution of a redundant circuit in any partition and using partial address disablement and disablement override Charles E. Drake, Thomas E. Obremski 1998-03-03 $13,090,000