Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7103814 | Testing logic and embedded memory in parallel | William R. J. Corbin, Erik A. Nelson, Thomas E. Obremski, Donald L. Wheater | 2006-09-05 |
| 5691991 | Process for identifying defective interconnection net end points in boundary scan testable circuit devices | Edward E. Horton, III | 1997-11-25 |