Issued Patents All Time
Showing 1–25 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9847116 | Circuit and method for controlling MRAM cell bias voltages | Syed M. Alam, Thomas Andre | 2017-12-19 |
| 9740431 | Memory controller and method for interleaving DRAM and MRAM accesses | Syed M. Alam, Thomas Andre | 2017-08-22 |
| 9691442 | Memory device with reduced on-chip noise | Thomas Andre, Syed M. Alam | 2017-06-27 |
| 9583169 | Boosted supply voltage generator and method therefore | Syed M. Alam, Thomas Andre, Halbert S. Lin | 2017-02-28 |
| 9552863 | Memory device with sampled resistance controlled write voltages | Thomas Andre, Syed M. Alam, Chitra Subramanian | 2017-01-24 |
| 9542989 | Circuit and method for controlling MRAM cell bias voltages | Syed M. Alam, Thomas Andre | 2017-01-10 |
| 9418001 | Memory controller and method for interleaving DRAM and MRAM accesses | Syed M. Alam, Thomas Andre | 2016-08-16 |
| 9361964 | Boosted supply voltage generator for a memory device and method therefore | Syed M. Alam, Thomas Andre, Halbert S. Lin | 2016-06-07 |
| 9311980 | Word line supply voltage generator for a memory device and method therefore | Syed M. Alam, Thomas Andre, Halbert S. Lin | 2016-04-12 |
| 9183912 | Circuit and method for controlling MRAM cell bias voltages | Syed M. Alam, Thomas Andre | 2015-11-10 |
| 9135965 | Memory controller and method for interleaving DRAM and MRAM accesses | Syed M. Alam, Thomas Andre | 2015-09-15 |
| 9019794 | Memory device with reduced on-chip noise | Thomas Andre, Syed M. Alam | 2015-04-28 |
| 7903454 | Integrated circuit, memory cell array, memory module, and method of operating an integrated circuit | Rainer Leuschner, Ulrich Klostermann | 2011-03-08 |
| 7433253 | Integrated circuit, method of operating an integrated circuit, method of manufacturing an integrated circuit, memory module, stackable memory module | Hans-Heinrich Viehmann | 2008-10-07 |
| 7411854 | System and method for controlling constant power dissipation | Ulrich Klostermann | 2008-08-12 |
| 7411815 | Memory write circuit | — | 2008-08-12 |
| 7391639 | Memory device and method for reading data | — | 2008-06-24 |
| 7313043 | Magnetic Memory Array | Daniel Braun | 2007-12-25 |
| 7251178 | Current sense amplifier | Hans-Heinrich Viehmann | 2007-07-31 |
| 7239537 | Method and apparatus for current sense amplifier calibration in MRAM devices | John K. DeBrosse, Stefan Lammers, Hans-Heinrich Viehmann | 2007-07-03 |
| 7200033 | MRAM with coil for creating offset field | Daniel Braun | 2007-04-03 |
| 7161861 | Sense amplifier bitline boost circuit | Hans-Heinrich Viehmann | 2007-01-09 |
| 6982902 | MRAM array having a segmented bit line | John K. DeBrosse | 2006-01-03 |
| 6946882 | Current sense amplifier | William Robert Reohr, John K. DeBrosse | 2005-09-20 |
| 6944049 | Magnetic tunnel junction memory cell architecture | Heinz Hoenigschmid, John K. DeBrosse | 2005-09-13 |