DS

Devendra K. Sadana

IBM: 797 patents #8 of 70,183Top 1%
Globalfoundries: 22 patents #130 of 4,424Top 3%
KT King Abdulaziz City For Science And Technology: 14 patents #6 of 573Top 2%
BC Bay Zu Precision Co.: 7 patents #1 of 12Top 9%
EC Egypt Nanotechnology Center: 3 patents #12 of 29Top 45%
MT Matheson Tri-Gas: 3 patents #10 of 47Top 25%
HL Hefechip Corporation Limited: 2 patents #10 of 16Top 65%
GU George Washington University: 2 patents #62 of 325Top 20%
NV NVIDIA: 1 patents #4,316 of 7,811Top 60%
ET Elpis Technologies: 1 patents #31 of 121Top 30%
IM International Machines: 1 patents #1 of 34Top 3%
MIT: 1 patents #4,386 of 9,367Top 50%
TC Toshiba America Electronic Components: 1 patents #23 of 77Top 30%
UE US Dept of Energy: 1 patents #1,355 of 5,099Top 30%
📍 Pleasantville, NY: #1 of 229 inventorsTop 1%
🗺 New York: #7 of 115,490 inventorsTop 1%
Overall (All Time): #99 of 4,157,543Top 1%
826
Patents All Time

Issued Patents All Time

Showing 701–725 of 826 patents

Patent #TitleCo-InventorsDate
8128749 Fabrication of SOI with gettering layer Junedong Lee, Dominic J. Schepis 2012-03-06
8053759 Ion implantation for suppression of defects in annealed SiGe layers Stephen W. Bedell, Huajie Chen, Keith E. Fogel, Ghavam G. Shahidi 2011-11-08
8053810 Structures having lattice-mismatched single-crystalline semiconductor layers on the same lithographic level and methods of manufacturing the same Tymon Barwicz 2011-11-08
8053330 Quasi-hydrophobic Si-Si wafer bonding using hydrophilic Si surfaces and dissolution of interfacial bonding oxide Joel P. de Souza, John A. Ott, Alexander Reznicek, Katherine L. Saenger 2011-11-08
8039371 Reduced defect semiconductor-on-insulator hetero-structures Stephen W. Bedell, Jeehwan Kim, Alexander Reznicek 2011-10-18
7994028 Structures having lattice-mismatched single-crystalline semiconductor layers on the same lithographic level and methods of manufacturing the same Tymon Barwicz 2011-08-09
7993990 Multiple crystallographic orientation semiconductor structures Shreesh Narasimha, Paul D. Agnello, Xiaomeng Chen, Judson R. Holt, Mukesh V. Khare +1 more 2011-08-09
7964896 Buried channel MOSFET using III-V compound semiconductors and high k gate dielectrics Edward W. Kiewra, Steven J. Koester, Ghavam G. Shahidi, Yanning Sun 2011-06-21
7935612 Layer transfer using boron-doped SiGe layer Stephen W. Bedell, Keith E. Fogel, Daniel A. Inns, Jeehwan Kim, James Vichiconti 2011-05-03
7914619 Thick epitaxial silicon by grain reorientation annealing and applications thereof Joel P. de Souza, Keith E. Fogel, Daniel A. Inns, Katherine L. Saenger 2011-03-29
7897444 Strained semiconductor-on-insulator (sSOI) by a simox method Thomas N. Adam, Stephen W. Bedell, Joel P. de Souza, Keith E. Fogel, Alexander Reznicek +1 more 2011-03-01
7880241 Low-temperature electrically activated gate electrode and method of fabricating same John C. Arnold, Stephen W. Bedell, Keith E. Fogel 2011-02-01
7842940 Structure and method to form semiconductor-on-pores (SOP) for high device performance and low manufacturing cost Joel P. de Souza, Keith E. Fogel, Brian J. Greene, Haining Yang 2010-11-30
7833884 Strained semiconductor-on-insulator by Si:C combined with porous process Stephen W. Bedell, Joel P. de Souza, Alexander Reznicek 2010-11-16
7816664 Defect reduction by oxidation of silicon Stephen W. Bedell, Huajie Chen, Anthony G. Domenicucci, Keith E. Fogel 2010-10-19
7790593 Method for tuning epitaxial growth by interfacial doping and structure including same Katherina Babich, Bruce B. Doris, David R. Medeiros 2010-09-07
7785982 Structures containing electrodeposited germanium and methods for their fabrication Stephen W. Bedell, Hariklia Deligianni, Qiang Huang, Lubomyr T. Romankiw, Katherine L. Saenger 2010-08-31
7772096 Formation of SOI by oxidation of silicon with engineered porosity gradient Joel P. Desouza, Keith E. Fogel, Alexander Reznicek 2010-08-10
7759772 Method to form Si-containing SOI and underlying substrate with different orientations Meikei Ieong, Ghavam G. Shahidi 2010-07-20
7749869 Crystalline silicon substrates with improved minority carrier lifetime including a method of annealing and removing SiOx precipitates and getterning sites Joel P. de Souza, Harold J. Hovel, Daniel A. Inns, Ghavam G. Shahidi 2010-07-06
7718231 Thin buried oxides by low-dose oxygen implantation into modified silicon Kwang Su Choe, Keith E. Fogel, Siegfried Maurer, Ryan Mitchell 2010-05-18
7691688 Strained silicon CMOS on hybrid crystal orientations Kevin K. Chan, Meikei Ieong, Alexander Reznicek, Leathen Shi, Min Yang 2010-04-06
7682917 Disposable metallic or semiconductor gate spacer Stephen W. Bedell, Michael P. Chudzik, William K. Henson, Naim Moumen, Vijay Narayanan +2 more 2010-03-23
7679141 High-quality SGOI by annealing near the alloy melting point Stephen W. Bedell, Huajie Chen, Anthony G. Domenicucci, Keith E. Fogel, Richard J. Murphy 2010-03-16
7655551 Control of poly-Si depletion in CMOS via gas phase doping Yaocheng Liu, Alexander Reznicek 2010-02-02