Issued Patents All Time
Showing 26–50 of 181 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10831688 | Reconfigurable network infrastructure | Prasanna Jayaraman, Erich J. Hauptli | 2020-11-10 |
| 10826810 | Versatile signal detector circuit using common mode shift with all-pass characteristics | Yang You, Pier Andrea Francese, Glen A. Wiedemeier, Chad Andrew Marquart | 2020-11-03 |
| 10747280 | Reconfigurble CPU/GPU interconnect to mitigate power/thermal throttling | Prasanna Jayaraman, Erich J. Hauptli | 2020-08-18 |
| 10652998 | Multilayer ceramic electronic package with modulated mesh topology | Jinwoo Choi, Yanyan Zhang | 2020-05-12 |
| 10635736 | System, method and computer program product for data transfer management | Robert H. Bell, Jr., Louis Bennie Capps, Jr., Luis A. Lastras-Montano, Michael J. Shapiro | 2020-04-28 |
| 10216653 | Pre-transmission data reordering for a serial interface | Lakshminarayana B. Arimilli, Yiftach Benjamini, Bartholomew Blaner, John D. Irish, David J. Krolak +6 more | 2019-02-26 |
| 10199706 | Communication system having a multi-layer PCB including a dielectric waveguide layer with a core and cladding directly contacting ground planes | Samuel R. Connor, Jose A. Hejase, Joseph Kuczynski, Joshua C. Myers, Junyan Tang | 2019-02-05 |
| 10181628 | Reduction of crosstalk between dielectric waveguides using split ring resonators | Jose A. Hejase, Joshua C. Myers, Junyan Tang | 2019-01-15 |
| 10177755 | Overvoltage protection circuit | — | 2019-01-08 |
| 10135162 | Method for fabricating a hybrid land grid array connector | Jose A. Hejase, Wiren D. Becker, Sungjun Chun, Brian S. Beaman | 2018-11-20 |
| 10128593 | Connector having a body with a conductive layer common to top and bottom surfaces of the body as well as to wall surfaces of a plurality of holes in the body | Jose A. Hejase, Wiren D. Becker, Sungjun Chun, Brian S. Beaman | 2018-11-13 |
| 10102884 | Distributed serialized data buffer and a memory module for a cascadable and extended memory subsystem | Paul W. Coteus, Charles A. Kilmer, Kyu-hyoun Kim, Warren E. Maule, Todd E. Takken | 2018-10-16 |
| 10034393 | Implementing high-speed signaling via dedicated printed circuit-board media | Douglas A. Baska, Rohan U. Mandrekar, Roger D. Weekly | 2018-07-24 |
| 9929726 | Overvoltage protection circuit | — | 2018-03-27 |
| 9912324 | Open-loop quadrature clock corrector and generator | Paul W. Coteus, Kyu-hyoun Kim, Glen A. Wiedemeier | 2018-03-06 |
| 9893400 | Method for performing frequency band splitting | Jose A. Hejase, Rubina F. Ahmed, James D. Jordan, Nam H. Pham, Lloyd A. Walls | 2018-02-13 |
| 9838110 | Dynamic link repair from lane failure with minimal link-down time while sparing fault channels | Nanju Na, Kaveh Naderi, James E. Smith | 2017-12-05 |
| 9774389 | Dynamic link repair from lane failure with minimal link down-time while sparing fault channels | Nanju Na, Kaveh Naderi, James E. Smith | 2017-09-26 |
| 9733305 | Frequency-domain high-speed bus signal integrity compliance model | Wiren D. Becker, Jose A. Hejase, Glen A. Wiedemeier, Si T. Win | 2017-08-15 |
| 9715270 | Power reduction in a parallel data communications interface using clock resynchronization | Steven J. Baumgartner, Michael B. Spear | 2017-07-25 |
| 9705591 | Dynamic optical channel sparing in an industry standard input/output subsystem | Patrick Allen Buckland, Nanju Na, Suzanne M. Nolen | 2017-07-11 |
| 9686053 | Frequency-domain high-speed bus signal integrity compliance model | Wiren D. Becker, Jose A. Hejase, Glen A. Wiedemeier, Si T. Win | 2017-06-20 |
| 9684629 | Efficient calibration of a low power parallel data communications channel | Timothy O. Dickson, Frank D. Ferraiolo, Douglas J. Joseph | 2017-06-20 |
| 9673941 | Frequency-domain high-speed bus signal integrity compliance model | Wiren D. Becker, Jose A. Hejase, Glen A. Wiedemeier, Si T. Win | 2017-06-06 |
| 9638750 | Frequency-domain high-speed bus signal integrity compliance model | Wiren D. Becker, Jose A. Hejase, Glen A. Wiedemeier, Si T. Win | 2017-05-02 |