Issued Patents All Time
Showing 25 most recent of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12155397 | Control loop circuitry | Neeraj Savla | 2024-11-26 |
| 10432209 | Linear feedback shift register-based clock signal generator, time domain-interleaved analog to digital converter and methods | Steven E. Mikes, Hayden C. Cranford, Jr., John K. Koehler | 2019-10-01 |
| 9715270 | Power reduction in a parallel data communications interface using clock resynchronization | Daniel M. Dreps, Michael B. Spear | 2017-07-25 |
| 9710577 | Heat source integration for electromigration analysis | James M. Johnson, David M. Onsongo | 2017-07-18 |
| 9712170 | Level-shifting latch | Anthony Gus Aipperspach, Charles P. Geer, David P. Paulsen, David W. Siljenberg, Alan P. Wagstaff | 2017-07-18 |
| 9553584 | Level-shifting latch | Anthony Gus Aipperspach, Charles P. Geer, David P. Paulsen, David W. Siljenberg, Alan P. Wagstaff | 2017-01-24 |
| 9474034 | Power reduction in a parallel data communications interface using clock resynchronization | Daniel M. Dreps, Michael B. Spear | 2016-10-18 |
| 8898504 | Parallel data communications mechanism having reduced power continuously calibrated lines | Frank D. Ferraiolo, Susan M. Eickhoff, Michael B. Spear | 2014-11-25 |
| 8686884 | Testing of digital to analog converters in serial interfaces | William Corti, Joseph Natonio | 2014-04-01 |
| 8310298 | Ratioed feedback body voltage bias generator | Patrick L. Rosno, Dana Marie Woeste | 2012-11-13 |
| 7945805 | Architecture for a physical interface of a high speed front side bus | Anthony R. Bonaccio, Timothy C. Buchholtz, Daniel M. Dreps, Charles P. Geer, Mounir Meghelli +3 more | 2011-05-17 |
| 7940878 | Unlock mode in source synchronous receivers | Timothy C. Buchholtz, Andrew D. Davies, Thomas W. Liang, Andrew Benson Maki, Thomas Pham +2 more | 2011-05-10 |
| 7904741 | Dynamic clock phase alignment between independent clock domains | Charles P. Geer | 2011-03-08 |
| 7787766 | Fault sensor for a laser driver circuit | Stephen J. Ames, Christopher K. White | 2010-08-31 |
| 7733984 | Implementing phase rotator circuits with embedded polyphase filter network stage | Anthony R. Bonaccio, John F. Bulzacchelli, Daniel M. Dreps | 2010-06-08 |
| 7716514 | Dynamic clock phase alignment between independent clock domains | Charles P. Geer | 2010-05-11 |
| 7652523 | Ratioed feedback body voltage bias generator | Patrick L. Rosno, Dana Marie Woeste | 2010-01-26 |
| 7624297 | Architecture for a physical interface of a high speed front side bus | Anthony R. Bonaccio, Timothy C. Buchholtz, Daniel M. Dreps, Charles P. Geer, Mounir Meghelli +3 more | 2009-11-24 |
| 7573937 | Phase rotator control test scheme | Anthony R. Bonaccio, Timothy C. Buchholtz, Charles P. Geer, Daniel G. Young | 2009-08-11 |
| 7489039 | Metal fill region of a semiconductor chip | Chun-Tao Li, Salvatore N. Storino, Mankit Wong | 2009-02-10 |
| 7474144 | Ratioed feedback body voltage bias generator | Patrick L. Rosno, Dana Marie Woeste | 2009-01-06 |
| 7453306 | Pulse shaping circuit | Brad A. Natzke | 2008-11-18 |
| 7359432 | Speed negotiation for serial transceivers | — | 2008-04-15 |
| 7212589 | Speed negotiation for serial transceivers | — | 2007-05-01 |
| 6906306 | Photodiode optical power monitor | — | 2005-06-14 |