| 8108731 |
Configuration validation system for computer clusters |
Casimer M. DeCusatis, Aruna V. Ramanan, Edward J. Seminaro, Alison B. White |
2012-01-31 |
| 8020050 |
Validation of computer interconnects |
Casimer M. DeCusatis, Aruna V. Ramanan, Edward J. Seminaro, Alison B. White |
2011-09-13 |
| 7940878 |
Unlock mode in source synchronous receivers |
Steven J. Baumgartner, Timothy C. Buchholtz, Andrew D. Davies, Thomas W. Liang, Andrew Benson Maki +2 more |
2011-05-10 |
| 7573937 |
Phase rotator control test scheme |
Steven J. Baumgartner, Anthony R. Bonaccio, Timothy C. Buchholtz, Charles P. Geer |
2009-08-11 |
| 6937060 |
Method and apparatus for implementing power control in multi-voltage I/O circuits |
Daniel Bravo Lacap, John Mitby, David W. Siljenberg |
2005-08-30 |
| 6476659 |
Voltage level shifter and phase splitter |
Vimal R. Patel, Curtis Walter Preuss |
2002-11-05 |
| 6239617 |
Mixed voltage output driver with automatic impedance adjustment |
David LeRoy Guertin, Robert R. Williams, Joseph J. Cahill |
2001-05-29 |
| 6195775 |
Boundary scan latch configuration for generalized scan designs |
Steven M. Douskey, Paul Allen Ganfield |
2001-02-27 |
| 6154791 |
Communication system for an array of direct access storage devices (DASD) that provides for bypassing one or multiple DASD |
Christopher John Kimble, Thomas James Osten, Paul Gary Reuland |
2000-11-28 |
| 5804998 |
Voltage upwardly compliant CMOS off-chip driver |
Joseph J. Cahill, Robert R. Williams |
1998-09-08 |
| 5530808 |
System for transferring ownership of transmitted data packet from source node to destination node upon reception of echo packet at source node from destination node |
William A. Hammond, George Wayne Nation |
1996-06-25 |
| 5093908 |
Method and apparatus for executing instructions in a single sequential instruction stream in a main processor and a coprocessor |
Thomas J. Beacom, Jeffrey Douglas Brown, Mark Robert Funk, Scott A. Hilker |
1992-03-03 |
