Issued Patents All Time
Showing 26–50 of 220 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9443772 | Diffusion-controlled semiconductor contact creation | Emre Alptekin, Nicolas L. Breil, Christian Lavoie, Ahmet S. Ozcan, Kathryn T. Schonenberg | 2016-09-13 |
| 9406554 | Diffusion barrier layer formation | Brett H. Engel, Domingo A. Ferrer, Arun Vijayakumar | 2016-08-02 |
| 9343372 | Metal stack for reduced gate resistance | Ruqiang Bao, Unoh Kwon, Rekha Rajaram | 2016-05-17 |
| 9337334 | Semiconductor memory device employing a ferromagnetic gate | Hari V. Mallela, Edward J. Nowak, Yunsheng Song, Reinaldo Vega, Zhijian Yang | 2016-05-10 |
| 9337289 | Replacement gate MOSFET with a high performance gate electrode | Zhengwen Li, Dechao Guo, Randolph F. Knarr, Chengwen Pei, Gan Wang +3 more | 2016-05-10 |
| 9335759 | Optimization of a laser anneal beam path for maximizing chip yield | Nicolas L. Breil, Oleg Gluschenkov | 2016-05-10 |
| 9299795 | Partial sacrificial dummy gate with CMOS device with high-k metal gate | Dechao Guo, Wilfried E. Haensch, Shu-Jen Han, Daniel Jaeger, Yu Lu | 2016-03-29 |
| 9257519 | Semiconductor device including graded gate stack, related method and design structure | Michael P. Chudzik, Min Dai, Jinping Liu, Joseph F. Shepard, Jr. | 2016-02-09 |
| 9224675 | Automatic capacitance tuning for robust middle of the line contact and silicide applications | Patrick W. DeHaven, Brett H. Engel, Domingo A. Ferrer, Arun Vijayakumar | 2015-12-29 |
| 9224640 | Method to improve fine Cu line reliability in an integrated circuit device | Chad M. Burke, Baozhen Li, Chih-Chao Yang | 2015-12-29 |
| 9184214 | Semiconductor device exhibiting reduced parasitics and method for making same | Bruce B. Doris, Kangguo Cheng | 2015-11-10 |
| 9171954 | FinFET structure and method to adjust threshold voltage in a FinFET structure | Eduard A. Cartier, Brian J. Greene, Dechao Guo, Gan Wang, Yanfeng Wang | 2015-10-27 |
| 9142660 | Method to fabricate a vertical transistor having an asymmetric gate with two conductive layers having different work functions | Dechao Guo, Shu-Jen Han, Jun Yuan | 2015-09-22 |
| 9129964 | Programmable electrical fuse | Jason Coyner, Baozhen Li, Chih-Chao Yang | 2015-09-08 |
| 9105725 | Semiconductor-on-insulator device including stand-alone well implant to provide junction butting | Dechao Guo, Wilfried Haensch, Gan Wang, Xin Wang, Yanfeng Wang | 2015-08-11 |
| 9099493 | Semiconductor device with raised source/drain and replacement metal gate | Kangguo Cheng, Junli Wang, Chih-Chao Yang | 2015-08-04 |
| 9087811 | Self aligned embedded gate carbon transistors | Dechao Guo, Shu-Jen Han, Yu Lu | 2015-07-21 |
| 9080239 | Method and apparatus for angular high density plasma chemical vapor deposition | Daewon Yang, Kangguo Cheng, Pavel Smetana, Richard S. Wise | 2015-07-14 |
| 9059313 | Replacement gate having work function at valence band edge | Michael P. Chudzik, Unoh Kwon | 2015-06-16 |
| 9059291 | Semiconductor-on-insulator device including stand-alone well implant to provide junction butting | Dechao Guo, Wilfried Haensch, Gan Wang, Xin Wang, Yanfeng Wang | 2015-06-16 |
| 9059217 | FET semiconductor device with low resistance and enhanced metal fill | Kangguo Cheng, Junli Wang, Chih-Chao Yang | 2015-06-16 |
| 9059091 | Transistor having replacement metal gate and process for fabricating the same | Dechao Guo | 2015-06-16 |
| 9059006 | Replacement-gate-compatible programmable electrical antifuse | Satya N. Chakravarti, Dechao Guo, Chuck T. Le, Byoung W. Min, Thekkemadathil V. Rajeevakumar | 2015-06-16 |
| 9048216 | Self aligned embedded gate carbon transistors | Dechao Guo, Shu-Jen Han, Yu Lu | 2015-06-02 |
| 9041076 | Partial sacrificial dummy gate with CMOS device with high-k metal gate | Dechao Guo, Wilfried E. Haensch, Shu-Jen Han, Daniel Jaeger, Yu Lu | 2015-05-26 |