Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
EL

Edward Law — 22 Patents

Broadcom: 15 patents #673 of 9,346Top 8%
APAvago Technologies General Ip (Singapore) Pte.: 2 patents #524 of 2,004Top 30%
ALAdvanced Interconnect Technologies Limited: 1 patents #8 of 12Top 70%
SSSt Assembly Test Services: 1 patents #36 of 63Top 60%
Ladera Ranch, CA: #22 of 240 inventorsTop 10%
California: #25,951 of 386,348 inventorsTop 7%
Overall (All Time): #189,202 of 4,157,543Top 5%
22 Patents All Time
Edward Law has been granted 22 US patents while listed as an inventor at Broadcom. The first was granted in 2005 and the most recent in June 2021. Edward Law ranks #189,202 of 4,157,543 US inventors in our database (top 4.6%). Patent records list Edward Law in Ladera Ranch, CA, US.

Issued Patents All Time

Showing 1–22 of 22 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11049829 Redistribution metal and under bump metal interconnect structures and method Sam Ziqun Zhao, Liming Tsau, Andy Brotman 2021-06-29
10615110 Thin recon interposer package without TSV for fine input/output pitch fan-out Sam Ziqun Zhao, Sam Karikalan, Rezaur Rahman Khan, Pieter Vorenkamp 2020-04-07
10504862 Redistribution metal and under bump metal interconnect structures and method Sam Ziqun Zhao, Liming Tsau, Andy Brotman 2019-12-10
10008439 Thin recon interposer package without TSV for fine input/output pitch fan-out Sam Ziqun Zhao, Sam Karikalan, Rezaur Rahman Khan, Pieter Vorenkamp 2018-06-26 $113,151,000
9693461 Magnetic-core three-dimensional (3D) inductors and packaging integration Sam Ziqun Zhao, Sampath Komarapalayam Velayudham Karikalan, Neal Kistler, Rezaur Rahman Khan, Pieter Vorenkamp 2017-06-27 $38,891,000
9564391 Thermal enhanced package using embedded substrate Kevin Hu 2017-02-07
9390993 Semiconductor border protection sealant Sam Ziqun Zhao, Galen Kirkpatrick, Reza-ur Rahman Khan, Ming Wang Sze 2016-07-12
8957694 Wafer level package resistance monitor scheme Kunzhong Hu, Chonghua Zhong 2015-02-17 $5,270,000
8945991 Fabricating a wafer level semiconductor package having a pre-formed dielectric layer Kevin Hu, Chonghua Zhong 2015-02-03 $5,539,000
8922014 Wafer level semiconductor package Kevin Hu, Chonghua Zhong 2014-12-30 $4,929,000
8779598 Method and apparatuses for integrated circuit substrate manufacture Fan Yeung, Raymond Tsang 2014-07-15 $9,003,000
8686558 Thermally and electrically enhanced ball grid array package Sam Ziqun Zhao, Reza-ur Rahman Khan, Marc Papageorge 2014-04-01 $4,041,000
8592259 Method of fabricating a wafer level semiconductor package having a pre-formed dielectric layer Kevin Hu, Chonghua Zhong 2013-11-26 $5,420,000
8587123 Multi-chip and multi-substrate reconstitution based packaging Kevin Hu, Rezaur Rahman Khan 2013-11-19 $3,691,000
8367475 Chip scale package assembly in reconstitution panel process format Rezaur Rahman Khan, Edmund Law 2013-02-05 $4,643,000
8169067 Low profile ball grid array (BGA) package with exposed die and method of making same Sam Ziqun Zhao, Rezaur Rahman Khan 2012-05-01 $2,857,000
8088647 Bumping free flip chip process Kunzhong Hu 2012-01-03 $2,839,000
8039949 Ball grid array package having one or more stiffeners Sam Ziqun Zhao, Rezaur Rahman Khan, Marc Papageorge 2011-10-18 $5,208,000
7629681 Ball grid array package with patterned stiffener surface and method of assembling the same Sam Ziqun Zhao, Reza-ur Rahman Khan, Marc Papageorge 2009-12-08 $6,120,000
7259445 Thermal enhanced package for block mold assembly Daniel Lau 2007-08-21
7091469 Packaging for optoelectronic devices Dean Paul Kossives, Kambhampati Ramakrishna, Diane Sahakian, Theodore G. Tessier, Jamin Ling 2006-08-15 $1,428,000
6882042 Thermally and electrically enhanced ball grid array packaging Sam Ziqun Zhao, Reaz-ur Rahman Khan, Marc Papageorge 2005-04-19 $5,511,000