Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9831201 | Methods for forming pillar bumps on semiconductor wafers | Guy F. Burgess, Anthony P. Curtis, Lillian C. Thompson | 2017-11-28 |
| 9627254 | Method for building vertical pillar interconnect | Guy F. Burgess, Anthony P. Curtis, Eugene A. Stout, Lillian C. Thompson | 2017-04-18 |
| 9070747 | Electroplating using dielectric bridges | Eugene A. Stout, Douglas M. Scott, Anthony P. Curtis, Guy F. Burgess | 2015-06-30 |
| 8686556 | Wafer level applied thermal heat sink | David C. Clark | 2014-04-01 |
| 7091469 | Packaging for optoelectronic devices | Dean Paul Kossives, Kambhampati Ramakrishna, Edward Law, Diane Sahakian, Jamin Ling | 2006-08-15 |
| 6022761 | Method for coupling substrates and structure | Melissa Grupen-Shemansky, Jong-Kai Lin | 2000-02-08 |
| 5892661 | Smartcard and method of making | John W. Stafford, David Jandzinski | 1999-04-06 |
| 5789815 | Three dimensional semiconductor package having flexible appendages | John W. Stafford, David Jandzinski | 1998-08-04 |
| 5661088 | Electronic component and method of packaging | Kenneth Kaskoun, David Jandzinski | 1997-08-26 |
| 5221426 | Laser etch-back process for forming a metal feature on a non-metal substrate | John W. Stafford, William F. Hoffman | 1993-06-22 |
| 5217568 | Silicon etching process using polymeric mask, for example, to form V-groove for an optical fiber coupling | Scott E. Lindsey | 1993-06-08 |