Issued Patents All Time
Showing 1–25 of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6217655 | Stand-off pad for supporting a wafer on a substrate support chuck | Ananda H. Kumar, Shamouil Shamouilian, Vijay D. Parkhe | 2001-04-17 |
| 6184150 | Oxide etch process with high selectivity to nitride suitable for use on surfaces of uneven topography | Chan-Lon Yang, Mei Chang, Paul Arleo, Haojiang Li | 2001-02-06 |
| 6110821 | Method for forming titanium silicide in situ | Gene Y. Kohara, Fusen Chen, Zheng Xu, Peijun Ding, Gongda Yao +1 more | 2000-08-29 |
| 5986875 | Puncture resistant electrostatic chuck | Arik Donde, Robert Wu, Andreas Hegedus, Edwin C. Weldon, Shamouil Shamouilian +2 more | 1999-11-16 |
| 5903428 | Hybrid Johnsen-Rahbek electrostatic chuck having highly resistive mesas separating the chuck from a wafer supported thereupon and method of fabricating same | Dennis S. Grimard, Vijay D. Parkhe, Fusen Chen, Michael G. Chafin | 1999-05-11 |
| 5753132 | Method of making electrostatic chuck with conformal insulator film | Shamouil Shamouilian, Sasson Somekh, Manoocher Birang, Semyon Sherstinsky, John F. Cameron | 1998-05-19 |
| 5745331 | Electrostatic chuck with conformal insulator film | Shamouil Shamouilian, Sasson Somekh, Manoocher Birang, Semyon Sherstinsky, John F. Cameron | 1998-04-28 |
| 5729423 | Puncture resistant electrostatic chuck | Arik Donde, Robert Wu, Andreas Hegedus, Edwin C. Weldon, Shamouil Shamouilian +2 more | 1998-03-17 |
| 5585012 | Self-cleaning polymer-free top electrode for parallel electrode etch operation | Robert Wu, Hongching Shan | 1996-12-17 |
| 5491603 | Method of determining a dechucking voltage which nullifies a residual electrostatic force between an electrostatic chuck and a wafer | Manoocher Birang, Jian Ding | 1996-02-13 |
| 5360524 | Method for planarization of submicron vias and the manufacture of semiconductor integrated circuits | Rudi Hendel | 1994-11-01 |
| 4985373 | Multiple insulating layer for two-level interconnected metallization in semiconductor integrated circuit structures | William D. Powell, Jr., Ashok Sinha | 1991-01-15 |
| 4937643 | Devices having tantalum silicide structures | Jean DESLAURIERS | 1990-06-26 |
| RE32207 | Method for making integrated semiconductor circuit structure with formation of Ti or Ta silicide | Shyam P. Murarka, Ashok Sinha | 1986-07-15 |
| 4555842 | Method of fabricating VLSI CMOS devices having complementary threshold voltages | Sheila Vaidya | 1985-12-03 |
| 4522842 | Boron nitride X-ray masks with controlled stress | Shyam P. Murarka, David S. Williams | 1985-06-11 |
| 4472237 | Reactive ion etching of tantalum and silicon | Jean DESLAURIERS | 1984-09-18 |
| 4427516 | Apparatus and method for plasma-assisted etching of wafers | Frederick Vratny | 1984-01-24 |
| 4419201 | Apparatus and method for plasma-assisted etching of wafers | Frederick Vratny | 1983-12-06 |
| 4378628 | Cobalt silicide metallization for semiconductor integrated circuits | Shyam P. Murarka, Ashok Sinha | 1983-04-05 |
| 4343677 | Method for patterning films using reactive ion etching thereof | Eliezer Kinsbron, William E. Willenbrock, Jr. | 1982-08-10 |
| 4341818 | Method for producing silicon dioxide/polycrystalline silicon interfaces | Arthur C. Adams | 1982-07-27 |
| 4332839 | Method for making integrated semiconductor circuit structure with formation of Ti or Ta silicide | Shyam P. Murarka, Ashok Sinha | 1982-06-01 |
| 4323638 | Reducing charging effects in charged-particle-beam lithography | Arthur C. Adams, Frank B. Alexander, Jr., Louis Thibault | 1982-04-06 |
| 4276557 | Integrated semiconductor circuit structure and method for making it | Shyam P. Murarka, Ashok Sinha | 1981-06-30 |