Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7880505 | Low power reconfigurable circuits with delay compensation | Sunil Khatri, Timothy Kevin Griffin, Nikhil Jayakumar | 2011-02-01 |
| RE35753 | Optical lithographical imaging system including optical transmission diffraction devices | Eric Raab, Donald L. White | 1998-03-24 |
| 5373180 | Planar isolation technique for integrated circuits | Steven J. Hillenius, William T. Lynch, Lalita Manchanda, Mark R. Pinto | 1994-12-13 |
| 5358827 | Phase-shifting lithographic masks with improved resolution | Joseph Garofalo, Robert L. Kostelak, Jr. | 1994-10-25 |
| 5338626 | Fabrication of phase-shifting lithographic masks | Joseph Garofalo, Robert L. Kostelak, Jr., Christophe Pierrat | 1994-08-16 |
| 5320918 | Optical lithographical imaging system including optical transmission diffraction devices | Eric Raab, Donald L. White | 1994-06-14 |
| 5275896 | Single-alignment-level lithographic technique for achieving self-aligned features | Joseph Garofalo, Robert L. Kostelak, Jr., Christophe Pierrat | 1994-01-04 |
| 5153083 | Method of making phase-shifting lithographic masks | Joseph Garofalo, Robert L. Kostelak, Jr. | 1992-10-06 |
| 4992394 | Self aligned registration marks for integrated circuit fabrication | Robert L. Kostelak, Jr., William T. Lynch | 1991-02-12 |
| 4675715 | Semiconductor integrated circuit vertical geometry impedance element | Martin P. Lepselter, Ashok Sinha | 1987-06-23 |
| 4555842 | Method of fabricating VLSI CMOS devices having complementary threshold voltages | Hyman J. Levinstein | 1985-12-03 |
| 4450620 | Fabrication of MOS integrated circuit devices | Ellis N. Fuls, Nadia Lifshitz | 1984-05-29 |
| 4438450 | Solid state device with conductors having chain-shaped grain structure | Tan T. Sheng, Ashok Sinha | 1984-03-20 |