SL

Sergey Lopatin

AM AMD: 104 patents #28 of 9,279Top 1%
Applied Materials: 20 patents #657 of 7,310Top 9%
KL Kla-Tencor: 5 patents #809 of 1,394Top 60%
EK Endress+Hauser Se+Co. Kg: 3 patents #67 of 262Top 30%
SL Spansion Llc.: 2 patents #309 of 769Top 45%
GE Genus: 1 patents #35 of 76Top 50%
Globalfoundries: 1 patents #2,221 of 4,424Top 55%
EN Endress+Hauser: 1 patents #80 of 149Top 55%
🗺 California: #1,165 of 386,348 inventorsTop 1%
Overall (All Time): #7,376 of 4,157,543Top 1%
138
Patents All Time

Issued Patents All Time

Showing 76–100 of 138 patents

Patent #TitleCo-InventorsDate
6528412 Depositing an adhesion skin layer and a conformal seed layer to fill an interconnect opening Pin-Chin Connie Wang 2003-03-04
6528409 Interconnect structure formed in porous dielectric material with minimized degradation and electromigration Fei Wang, Diana M. Schonauer, Steven C. Avanzino 2003-03-04
6518648 Superconductor barrier layer for integrated circuit interconnects 2003-02-11
6515368 Semiconductor device with copper-filled via includes a copper-zinc/alloy film for reduced electromigration of copper Alexander H. Nickel 2003-02-04
6509262 Method of reducing electromigration in copper lines by calcium-doping copper surfaces in a chemical solution 2003-01-21
6504251 Heat/cold amorphized barrier layer for integrated circuit interconnects Minh Quoc Tran, Minh Van Ngo 2003-01-07
6501177 Atomic layer barrier layer for integrated circuit interconnects Minh Van Ngo, Minh Quoc Tran 2002-12-31
6500743 Method of copper-polysilicon T-gate formation Steven C. Avanzino, Matthew S. Buynoski 2002-12-31
6498093 Formation without vacuum break of sacrificial layer that dissolves in acidic activation solution within interconnect Krishnashree Achuthan 2002-12-24
6495443 Method of re-working copper damascene wafers Richard J. Huang 2002-12-17
6489683 Variable grain size in conductors for semiconductor vias and trenches John A. Iacoponi 2002-12-03
6486560 Semiconductor device fabricated by a method of reducing electromigration in copper lines by forming an interim layer of calcium-doped copper seed layer in a chemical solution 2002-11-26
6482656 Method of electrochemical formation of high Tc superconducting damascene interconnect for integrated circuit 2002-11-19
6479902 Semiconductor catalytic layer and atomic layer deposition thereof Carl Galewski 2002-11-12
6475272 Chemical solution for Cu-Ca-O thin film formations on Cu surfaces 2002-11-05
6472310 Tin palladium activation with maximized nuclei density and uniformity on barrier material in interconnect structure Krishnashree Achuthan 2002-10-29
6469387 Semiconductor device formed by calcium doping a copper surface using a chemical solution Joffre F. Bernard, Paul L. King 2002-10-22
6465867 Amorphous and gradated barrier layer for integrated circuit interconnects Joffre F. Bernard 2002-10-15
6455425 Selective deposition process for passivating top interface of damascene-type Cu interconnect lines Paul R. Besser, Darrell M. Erb 2002-09-24
6455415 Method of encapsulated copper (Cu) interconnect formation Robin Cheung 2002-09-24
6447933 Formation of alloy material using alternating depositions of alloy doping element and bulk material Pin-Chin Connie Wang 2002-09-10
6444580 Method of reducing carbon, sulphur, and oxygen impurities in a calcium-doped copper surface and semiconductor device thereby formed Paul L. King, Joffre F. Bernard 2002-09-03
6440830 Method of copper-polysilicon gate formation 2002-08-27
6433379 Tantalum anodization for in-laid copper metallization capacitor Steven C. Avanzino, Qi Xiang, Matthew S. Buynoski 2002-08-13
6426293 Minimizing resistance and electromigration of interconnect by adjusting anneal temperature and amount of seed layer dopant Pin-Chin Connie Wang, Amit P. Marathe 2002-07-30