QX

Qi Xiang

AM AMD: 175 patents #10 of 9,279Top 1%
IN Intel: 18 patents #2,286 of 30,777Top 8%
Globalfoundries: 9 patents #393 of 4,424Top 9%
CM Chartered Semiconductor Manufacturing: 1 patents #419 of 840Top 50%
LS Lattice Semiconductor: 1 patents #317 of 544Top 60%
VA Vantis: 1 patents #13 of 24Top 55%
📍 San Jose, CA: #53 of 32,062 inventorsTop 1%
🗺 California: #527 of 386,348 inventorsTop 1%
Overall (All Time): #3,187 of 4,157,543Top 1%
205
Patents All Time

Issued Patents All Time

Showing 26–50 of 205 patents

Patent #TitleCo-InventorsDate
7952423 Process/design methodology to enable high performance logic and analog circuits using a single process Albert Ratnakumar, Jeffrey Tung, Weiqi Ding 2011-05-31
7923785 Field effect transistor having increased carrier mobility Boon Yong Ang, Jung-Suk Goo 2011-04-12
7732336 Shallow trench isolation process and structure with minimized strained silicon consumption James Pan, Jung-Suk Goo 2010-06-08
7713834 Method of forming isolation regions for integrated circuits Haihong Wang, Minh Van Ngo, Paul R. Besser, Eric N. Paton, Ming-Ren Lin 2010-05-11
7648886 Shallow trench isolation process Minh Van Ngo, Paul R. Besser, Eric N. Paton, Ming-Ren Lin 2010-01-19
7482252 Method for reducing floating body effects in SOI semiconductor device without degrading mobility David Wu, James F. Buller 2009-01-27
7462549 Shallow trench isolation process and structure with minimized strained silicon consumption James Pan, Jung-Suk Goo 2008-12-09
7422961 Method of forming isolation regions for integrated circuits Haihong Wang, Minh Van Ngo, Paul R. Besser, Eric N. Paton, Ming-Ren Lin 2008-09-09
7417250 Strained-silicon device with different silicon thicknesses James F. Buller, Derick J. Wristers, Bin Yu 2008-08-26
7351638 Scanning laser thermal annealing Cyrus E. Tabery, Eric N. Paton, Bin Yu, Robert B. Ogle 2008-04-01
7312125 Fully depleted strained semiconductor on insulator transistor and method of making the same Paul R. Besser, Minh Van Ngo, Eric N. Paton, Haihong Wang 2007-12-25
7306997 Strained fully depleted silicon on insulator semiconductor device and manufacturing method therefor Niraj Subba, Witold P. Maszara, Zoran Krivokapic, Ming-Ren Lin 2007-12-11
7238588 Silicon buffered shallow trench isolation 2007-07-03
7221025 Semiconductor on insulator substrate and devices formed therefrom 2007-05-22
7217608 CMOS with strained silicon channel NMOS and silicon germanium channel PMOS 2007-05-15
7211489 Localized halo implant region formed using tilt pre-amorphization implant and laser thermal anneal Robert B. Ogle, Eric N. Paton, Cyrus E. Tabery, Bin Yu 2007-05-01
7176531 CMOS gates formed by integrating metals having different work functions and having a high-k gate dielectric Huicai Zhong, Jung-Suk Goo, Allison Holbrook, Joong S. Jeon, George Jonathan Kluth 2007-02-13
7170084 Strained silicon MOSFET having improved source/drain extension dopant diffusion resistance and method for its fabrication Jung-Suk Goo, Haihong Wang 2007-01-30
7138302 Method of fabricating an integrated circuit channel region James Pan, Jung-Suk Goo 2006-11-21
7105421 Silicon on insulator field effect transistor with heterojunction gate Matthew S. Buynoski 2006-09-12
7091097 End-of-range defect minimization in semiconductor device Eric N. Paton, Cyrus E. Tabery, Bin Yu, Robert B. Ogle 2006-08-15
7078299 Formation of finFET using a sidewall epitaxial layer Witold P. Maszara, Jung-Suk Goo, James Pan 2006-07-18
7071051 Method for forming a thin, high quality buffer layer in a field effect transistor and related structure Joong S. Jeon, Robert Clark-Phelps, Huicai Zhong 2006-07-04
7071065 Strained silicon PMOS having silicon germanium source/drain extensions and method for its fabrication Eric N. Paton, Haihong Wang 2006-07-04
7033893 CMOS devices with balanced drive currents based on SiGe 2006-04-25