Issued Patents All Time
Showing 25 most recent of 77 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10212498 | Integrated circuit device with field programmable optical array | Mike Peng Li, Joel Martinez, Jon M. Long, Sergey Shumarayev | 2019-02-19 |
| 9979403 | Reference clock architecture for integrated circuit device | — | 2018-05-22 |
| 9960937 | High-speed serial data signal receiver circuitry | Mengchi Liu, Wilson Wong, Sergey Shumarayev | 2018-05-01 |
| 9876519 | Methods and apparatus for automated adaptation of transmitter equalizer tap settings | Donald Alderrou, Peng Li | 2018-01-23 |
| 9680675 | Methods and apparatus for automated adaptation of transmitter equalizer tap settings | Donald Alderrou, Peng Li | 2017-06-13 |
| 9660846 | High-speed serial data signal receiver circuitry | Mengchi Lui, Wilson Wong, Sergey Shumarayev | 2017-05-23 |
| 9654123 | Phase-locked loop architecture and clock distribution system | Tien Duc Pham, Sergey Shumarayev, Richard G. Cliff, Tim Tri Hoang | 2017-05-16 |
| 9608728 | Integrated circuit device with field programmable optical array | Mike Peng Li, Joel Martinez, Jon M. Long, Sergey Shumarayev | 2017-03-28 |
| 9543965 | Interposer with embedded clock network circuitry | — | 2017-01-10 |
| 9479181 | Reference clock architecture for integrated circuit device | — | 2016-10-25 |
| 9444656 | Flexible receiver architecture | Sergey Shumarayev, Peng Li, Sriram Narayan | 2016-09-13 |
| 9429625 | Analog signal test circuits and methods | Sergey Shumarayev | 2016-08-30 |
| 9401189 | Methods and apparatus for performing runtime data eye monitoring and continuous data strobe calibration | Warren Nordyke | 2016-07-26 |
| 9350530 | Phase-locked loop architecture and clock distribution system | Tien Duc Pham, Sergey Shumarayev, Richard G. Cliff, Tim Tri Hoang | 2016-05-24 |
| 9222972 | On-die jitter generator | Sergey Shumarayev, Mingde Pan, Peng Li, Masashi Shimanouchi | 2015-12-29 |
| 9224685 | Shielded metal-oxide-metal (MOM) capacitor structure | Wilson Wong, Shuxian Chen, Jeffrey T. Watt | 2015-12-29 |
| 9203604 | Methods and apparatus for performing bit swapping in clock data recovery circuitry | David W. Mendel, Gregg William Baeckler | 2015-12-01 |
| 9172566 | Methods and apparatus for multiple-stage CTLE adaptation | Wei Li, Wilson Wong, Jie Shen, Xudong Shi | 2015-10-27 |
| 9166832 | Methods and apparatus for decision feedback equalization adaptation | Wei Li | 2015-10-20 |
| 9166641 | Method and apparatus for receiver VGA adaptation | Wei Li | 2015-10-20 |
| 9112655 | Clock data recovery circuitry with programmable clock phase selection | Tim Tri Hoang, Sangeeta Raman, Richard Hernandez | 2015-08-18 |
| 9106230 | Input-output circuitry for integrated circuits | Bonnie I. Wang, Warren Nordyke, Yan Chong | 2015-08-11 |
| 9077323 | Latched comparator circuitry | Ali Atesoglu | 2015-07-07 |
| 9065399 | Programmable high-speed voltage-mode differential driver | Bonnie I. Wang, Tim Tri Hoang, Richard Hernandez, Haidang Lin | 2015-06-23 |
| 9054721 | Systems and methods for digital calibration of successive-approximation-register analog-to-digital converter | Wei Li, Yanjing Ke | 2015-06-09 |