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Technologies for chip-to-chip optical data transfer background |
Khaled Ahmed, Pooya Tadayon, Joshua B. Fryman |
2025-10-07 |
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Pseudo-monolithic data communication system |
Joshua B. Fryman, Khaled Ahmed, James E. Jaussi |
2025-10-07 |
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Universal transceiver container |
David W. Mendel, Joel Martinez, Curt Wortman |
2021-09-07 |
$31,495,000 |
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Apparatus and methods for calibrating analog circuitry in an integrated circuit |
Neville Carvalho, Tim Tri Hoang |
2021-02-02 |
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Integrated circuit device with field programmable optical array |
Mike Peng Li, Joel Martinez, Jon M. Long, Weiqi Ding |
2019-02-19 |
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| 10110328 |
Apparatus and methods for calibrating analog circuitry in an integrated circuit |
Neville Carvalho, Tim Tri Hoang |
2018-10-23 |
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| 9960937 |
High-speed serial data signal receiver circuitry |
Weiqi Ding, Mengchi Liu, Wilson Wong |
2018-05-01 |
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| 9660846 |
High-speed serial data signal receiver circuitry |
Weiqi Ding, Mengchi Lui, Wilson Wong |
2017-05-23 |
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| 9654123 |
Phase-locked loop architecture and clock distribution system |
Tien Duc Pham, Richard G. Cliff, Tim Tri Hoang, Weiqi Ding |
2017-05-16 |
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Integrated circuit device with field programmable optical array |
Mike Peng Li, Joel Martinez, Jon M. Long, Weiqi Ding |
2017-03-28 |
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Transceiver system with reduced latency uncertainty |
Neville Carvalho, Allan T. Davidson, Andy Turudic, Bruce B. Pedersen, David W. Mendel +5 more |
2017-01-31 |
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Flexible receiver architecture |
Weiqi Ding, Peng Li, Sriram Narayan |
2016-09-13 |
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Analog signal test circuits and methods |
Weiqi Ding |
2016-08-30 |
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Simulation tool for high-speed communications links |
Peng Li, Masashi Shimanouchi, Thungoc M. Tran |
2016-08-02 |
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| 9350530 |
Phase-locked loop architecture and clock distribution system |
Tien Duc Pham, Richard G. Cliff, Tim Tri Hoang, Weiqi Ding |
2016-05-24 |
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On-die jitter generator |
Weiqi Ding, Mingde Pan, Peng Li, Masashi Shimanouchi |
2015-12-29 |
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Integrated circuit system with dynamic decoupling and method of manufacture thereof |
Kyung Suk Oh, Hae-Chang Lee, Boon Jin Ang, Guang Chen |
2015-10-06 |
$19,105,000 |
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Serializer circuitry for high-speed serial data transmitters on programmable logic device integrated circuits |
Toan Thanh Nguyen, Thungoc M. Tran, Arch Zaliznyak, Shoujun Wang, Ramanand Venkata +1 more |
2015-07-07 |
$10,724,000 |
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Reconfigurable equalization architecture for high-speed receivers |
Xiaoyan Su, Sriram Narayan |
2015-05-05 |
$14,266,000 |
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Integrated optical-electronic interface in programmable integrated circuit device |
Peng Li, Jon M. Long, Tien Duc Pham |
2015-04-07 |
$17,520,000 |
| 8989214 |
High-speed serial data signal receiver circuitry |
Weiqi Ding, Mengchi Liu, Wilson Wong |
2015-03-24 |
$9,321,000 |
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Power supply filtering for programmable logic device having heterogeneous serial interface architecture |
Wilson Wong, Thungoc M. Tran, Tim Tri Hoang |
2015-03-10 |
$4,705,000 |
| 8866520 |
Phase-locked loop architecture and clock distribution system |
Tien Duc Pham, Richard G. Cliff |
2014-10-21 |
$9,681,000 |
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Integrated circuits with configurable inductors |
Weiqi Ding, Wilson Wong, Ali Atesoglu, Sharat Babu Ippili |
2014-09-16 |
$7,177,000 |
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Protocol-agnostic automatic rate negotiation for high-speed serial interface in a programmable logic device |
Allen Chan, Wilson Wong |
2014-09-09 |
$7,341,000 |
