Issued Patents All Time
Showing 25 most recent of 36 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10339074 | Integrated circuit with dynamically-adjustable buffer space for serial interface | Zun Yang Tan, Tat Mun Lui, Chiang Wei Lee, Richard Jin Guan Saw, Want Sent Khor | 2019-07-02 |
| 9680773 | Integrated circuit with dynamically-adjustable buffer space for serial interface | Zun Yang Tan, Tat Mun Lui, Chiang Wei Lee, Richard Jin Guan Saw, Want Sent Khor | 2017-06-13 |
| 9166591 | High speed IO buffer | Foong Tek Chan, Xiabao Wang, Khai Nguyen, Chiakang Sung, Ket Chiew Sia | 2015-10-20 |
| 9153572 | Integrated circuit system with dynamic decoupling and method of manufacture thereof | Kyung Suk Oh, Sergey Shumarayev, Hae-Chang Lee, Guang Chen | 2015-10-06 |
| 8739099 | Method and apparatus for determining clock uncertainties | Victor Maruri, Henry Y. Lui, Surinder Singh, Thow Pang Chong, Tony Ngai | 2014-05-27 |
| 8699291 | Memory circuitry with dynamic power control | Chin-Ghee Ch'ng, Wei Yee Koay | 2014-04-15 |
| 8694944 | Predicting routability of integrated circuits | Sze Huey Soo, Thow Pang Chong, Kar Keng Chua | 2014-04-08 |
| 8686758 | Integrated circuit with configurable I/O transistor arrangement | Ket Chiew Sia, Choong Kit Wong | 2014-04-01 |
| 8659334 | Frequency control clock tuning circuitry | Teik Wah Lim, Eng Huat Lee, Ie Chen Chia, Thow Pang Chong, Kim Pin Tan | 2014-02-25 |
| 8612814 | Memory error detection circuitry | Jun Tan, Kiun Kiet Jong | 2013-12-17 |
| 8533250 | Multiplier with built-in accumulator | Kok Yoong Foo, Yan Jiong Boo, Geok Sun Chong, Kar Keng Chua | 2013-09-10 |
| 8400863 | Configurable memory block | Zun Yang Tan, Wei Yee Koay, Tat Mun Lui, Eu Geen Chew | 2013-03-19 |
| 8232823 | Frequency control clock tuning circuitry | Teik Wah Lim, Eng Huat Lee, Ie Chen Chia, Thow Pang Chong, Kim Pin Tan | 2012-07-31 |
| 8189362 | Data encoding scheme to reduce sense current | Jun Tan, Tze Swan Tan, Chuan Khye Chai, Kar Keng Chua | 2012-05-29 |
| 8151224 | Method of designing integrated circuits including providing an option to select a mask layer set | Kar Keng Chua, Choong Kit Wong, Kok Yoong Foo, Thow Pang Chong | 2012-04-03 |
| 8037377 | Techniques for performing built-in self-test of receiver channel having a serializer | Ie Chen Chia, Eng Huat Lee, Thow Pang Chong, Kar Keng Chua | 2011-10-11 |
| 8037444 | Programmable control of mask-programmable integrated circuit devices | Bee Yee Ng, Thow Pang Chong, Yu Fong Tan | 2011-10-11 |
| 7978493 | Data encoding scheme to reduce sense current | Jun Tan, Tze Swan Tan, Chuan Khye Chai, Kar Keng Chua | 2011-07-12 |
| 7843216 | Techniques for optimizing design of a hard intellectual property block for data transmission | Darren van Wageningen, Curt Wortman, Thow Pang Chong, Dan Mansur, Ali Burney | 2010-11-30 |
| 7787314 | Dynamic real-time delay characterization and configuration | Jun Tan, Wei Yee Koay, Choong Kit Wong, Guang Sheng Soh | 2010-08-31 |
| 7683689 | Delay circuit with delay cells in different orientations | Tat Mun Lui, Kar Keng Chua, Thow Pang Chong, Kam Fai Suit | 2010-03-23 |
| 7639047 | Techniques for reducing clock skew in clock routing networks | Bee Yee Ng, Eng Huat Lee, Thow Pang Chong, Teng Kuan Koay | 2009-12-29 |
| 7565390 | Circuitry for facilitating performance of multiply-accumulate operations in programmable logic devices | Tat Mun Lui, Bee Yee Ng, Jun Tan | 2009-07-21 |
| 7479803 | Techniques for debugging hard intellectual property blocks | Darren van Wageningen | 2009-01-20 |
| 7434192 | Techniques for optimizing design of a hard intellectual property block for data transmission | Darren van Wageningen, Curt Wortman, Thow Pang Chong, Dan Mansur, Ali Burney | 2008-10-07 |