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High speed IO buffer |
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2015-10-20 |
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Duty cycle distortion correction circuitry |
John Henry Bui, Lay Hock Khoo, Khai Nguyen, Chiakang Sung |
2015-06-02 |
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Interface circuitry for an integrated circuit system |
Wei Yee Koay, Chin-Ghee Ch'ng, Tony Ngai, Sean Woei Voon |
2014-06-24 |
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Configurable delay circuitry with compensated delay |
Ee Mei Ooi, Kin Hong Au, Yan Chong, Joseph Huang |
2014-05-13 |
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Integrated circuit with configurable I/O transistor arrangement |
Choong Kit Wong, Boon Jin Ang |
2014-04-01 |
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Methods and systems for programmable implementation of on-chip termination calibration |
Foong Tek Chan |
2013-10-29 |
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Duty cycle distortion correction circuitry |
John Henry Bui, Lay Hock Khoo, Khai Nguyen, Chiakang Sung |
2013-07-02 |
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Voltage drop aware circuit placement |
Woi Jie Hooi, Teik Wah Lim |
2012-12-04 |
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Using a single buffer for multiple I/O standards |
Chai Yee Teng |
2010-12-21 |
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Low-jitter adjustable level shifter with native devices and kicker |
Choong Kit Wong, Boon Haw Ooi, Kok Siong Tee |
2007-02-20 |