MG

Mark I. Gardner

AM AMD: 507 patents #1 of 9,279Top 1%
TL Tokyo Electron Limited: 92 patents #12 of 5,567Top 1%
AP Advanced Microdevices Pvt: 2 patents #1 of 26Top 4%
Infineon Technologies Ag: 2 patents #3,160 of 7,486Top 45%
📍 Prairieville, TX: #1 of 6 inventorsTop 20%
🗺 Texas: #2 of 125,132 inventorsTop 1%
Overall (All Time): #244 of 4,157,543Top 1%
608
Patents All Time

Issued Patents All Time

Showing 426–450 of 608 patents

Patent #TitleCo-InventorsDate
5959337 Air gap spacer formation for high performance MOSFETs Daniel Kadosh, Michael Duane 1999-09-28
5959333 Reduction of dopant diffusion by the co-implantation of impurities into the transistor gate conductor H. Jim Fulford, Derick J. Wristers 1999-09-28
5955785 Copper-containing plug for connection of semiconductor surface with overlying conductor Fred N. Hause 1999-09-21
5953613 High performance MOSFET with a source removed from the semiconductor substrate and fabrication method thereof Frederick N. Hause 1999-09-14
5952696 Complementary metal oxide semiconductor device with selective doping Daniel Kadosh 1999-09-14
5952702 High performance MOSFET structure having asymmetrical spacer formation and having source and drain regions with different doping concentration Fred N. Hause 1999-09-14
5950091 Method of making a polysilicon gate conductor of an integrated circuit formed as a sidewall spacer on a sacrificial material H. Jim Fulford, Derick J. Wristers 1999-09-07
5950097 Advanced isolation scheme for deep submicron technology Kuang-Yeh Chang, Yowjuang W. Liu, Frederick N. Hause 1999-09-07
5949092 Ultra-high-density pass gate using dual stacked transistors having a gate structure with planarized upper surface in relation to interlayer insulator Daniel Kadosh, Michael Duane 1999-09-07
5950082 Transistor formation for multilevel transistors 1999-09-07
5946579 Stacked mask integration technique for advanced CMOS transistor formation H. Jim Fulford, Fred N. Hause 1999-08-31
5946581 Method of manufacturing a semiconductor device by doping an active region after formation of a relatively thick oxide layer Thomas E. Spikes, Jr., Robert Paiz 1999-08-31
5943585 Trench isolation structure having low K dielectric spacers arranged upon an oxide liner incorporated with nitrogen Charles E. May, H. Jim Fulford 1999-08-24
5943596 Fabrication of a gate electrode stack using a patterned oxide layer Mark C. Gilmer 1999-08-24
5942787 Small gate electrode MOSFET Robert Paiz, Thomas E. Spikes, Jr. 1999-08-24
5943562 Semiconductor fabrication employing a transistor gate coupled to a localized substrate Daniel Kadosh, Michael Duane 1999-08-24
5940707 Vertically integrated advanced transistor formation Michael Duane 1999-08-17
5940698 Method of making a semiconductor device having high performance gate electrode structure Mark C. Gilmer 1999-08-17
5937302 Method of forming lightly doped drain region and heavily doping a gate using a single implant step Frederick N. Hause 1999-08-10
5937303 High dielectric constant gate dielectric integrated with nitrogenated gate electrode H. Jim Fulford 1999-08-10
5937308 Semiconductor trench isolation structure formed substantially within a single chamber Mark C. Gilmer 1999-08-10
5937310 Reduced bird's beak field oxidation process using nitrogen implanted into active region Fred N. Hause, Kuang-Yeh Chang 1999-08-10
5936287 Nitrogenated gate structure for improved transistor performance and method for making same H. Jim Fulford 1999-08-10
5937299 Method for forming an IGFET with silicide source/drain contacts in close proximity to a gate with sloped sidewalls Mark W. Michael, Robert Dawson, H. Jim Fulford, Frederick N. Hause, Bradley T. Moore +1 more 1999-08-10
5937301 Method of making a semiconductor device having sidewall spacers with improved profiles Daniel Kadosh 1999-08-10