Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
BS

Bhanwar Singh

AMAMD: 250 patents #4 of 9,279Top 1%
Globalfoundries: 4 patents #817 of 4,424Top 20%
SLSpansion Llc.: 2 patents #309 of 769Top 45%
California: #321 of 386,348 inventorsTop 1%
Overall (All Time): #1,834 of 4,157,543Top 1%
259 Patents All Time

Issued Patents All Time

Showing 101–125 of 259 patents

Patent #TitleCo-InventorsDate
6684172 Sensor to predict void free films using various grating structures and characterize fill performance Ramkumar Subramanian, Steven C. Avanzino, Christopher F. Lyons, Khoi A. Phan, Bharath Rangarajan +1 more 2004-01-27
6673524 Attenuating extreme ultraviolet (EUV) phase-shifting mask fabrication method Kouros Ghandehari, Bruno M. LaFontaine 2004-01-06
6670271 Growing a dual damascene structure using a copper seed layer and a damascene resist structure Ramkumar Subramanian, Michael K. Templeton, Bharath Rangarajan 2003-12-30
6664030 System for and method of constructing an alternating phase-shifting mask Kouros Ghandehari, Bruno M. LaFontaine 2003-12-16
6665065 Defect detection in pellicized reticles via exposure at short wavelengths Khoi A. Phan, Wolfram Porsche 2003-12-16
6664180 Method of forming smaller trench line width using a spacer hard mask Angela T. Hui 2003-12-16
6653221 Method of forming a ground in SOI structures Ramkumar Subramanian, Bharath Rangarajan 2003-11-25
6654660 Controlling thermal expansion of mask substrates by scatterometry Christopher F. Lyons, Bharath Rangarajan, Khoi A. Phan, Ramkumar Subramanian 2003-11-25
6649426 System and method for active control of spacer deposition Bharath Rangarajan, Michael K. Templeton 2003-11-18
6650422 Scatterometry techniques to ascertain asymmetry profile of features and generate a feedback or feedforward process control data associated therewith Michael K. Templeton, Bharath Rangarajan, Ramkumar Subramanian 2003-11-18
6645702 Treat resist surface to prevent pattern collapse Bharath Rangarajan, Michael K. Templeton 2003-11-11
6641963 System and method for in situ control of post exposure bake time and temperature Bharath Rangarajan, Michael K. Templeton, Ramkumar Subramanian 2003-11-04
6635874 Self-cleaning technique for contamination on calibration sample in SEM Michael K. Templeton, Sanjay K. Yedur, Bryan K. Choo 2003-10-21
6633392 X-ray reflectance system to determine suitability of SiON ARC layer Arvind Halliyal, Ramkumar Subramanian 2003-10-14
6632283 System and method for illuminating a semiconductor processing system Bharath Rangarajan, Khoi A. Phan, Bryan K. Choo, Ramkumar Subramanian 2003-10-14
6630361 Use of scatterometry for in-situ control of gaseous phase chemical trim process Bharath Rangarajan, Michael K. Templeton, Ramkumar Subramanian, Cristina Cheung 2003-10-07
6629786 Active control of developer time and temperature Bharath Rangarajan, Michael K. Templeton, Ramkumar Subramanian 2003-10-07
6627526 Method for fabricating a conductive structure for a semiconductor device Wenge Yang 2003-09-30
6622547 System and method for facilitating selection of optimized optical proximity correction Khoi A. Phan, Ramkumar Subramanian 2003-09-23
6617087 Use of scatterometry to measure pattern accuracy Bharath Rangarajan, Ramkumar Subramanian 2003-09-09
6613500 Reducing resist residue defects in open area on patterned wafer using trim mask Khoi A. Phan, Ramkumar Subramanian, Michael K. Templeton, Jeff P. Erhardt 2003-09-02
6605546 Dual bake for BARC fill without voids Ramkumar Subramanian, Wolfram Grundke, Christopher F. Lyons, Marina V. Plat 2003-08-12
6605855 CVD plasma process to fill contact hole in damascene process Michael K. Templeton, Bharath Rangarajan, Christopher F. Lyons, Sanjay K. Yedur, Ramkumar Subramanian 2003-08-12
6602727 Scatterometry based active control of exposure conditions Bharath Rangarajan, Ramkumar Subramanian 2003-08-05
6597463 System to determine suitability of sion arc surface for DUV resist patterning Cristina Cheung, Jay Bhakta, Carmen Morales, Junwei Bao 2003-07-22