Issued Patents 2022
Showing 51–71 of 71 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11270935 | Metallization layer formation process | Kangguo Cheng, Chih-Chao Yang, Jing Guo | 2022-03-08 |
| 11271107 | Reduction of bottom epitaxy parasitics for vertical transport field effect transistors | Tao Li, Tsung-Sheng Kang, Alexander Reznicek | 2022-03-08 |
| 11264481 | Self-aligned source and drain contacts | Chanro Park, Kangguo Cheng, Juntao Li | 2022-03-01 |
| 11251288 | Nanosheet transistor with asymmetric gate stack | Carl Radens, Kangguo Cheng, Juntao Li, Dechao Guo, Tao Li +1 more | 2022-02-15 |
| 11251362 | Stacked spin-orbit-torque magnetoresistive random-access memory | Heng Wu, Julien Frougier, Chen Zhang | 2022-02-15 |
| 11251304 | Wrap-around bottom contact for bottom source/drain | Junli Wang, Alexander Reznicek, Bruce B. Doris | 2022-02-15 |
| 11251301 | Cross-bar vertical transport field effect transistors without corner rounding | Tsung-Sheng Kang, Tao Li, Alexander Reznicek | 2022-02-15 |
| 11251287 | Self-aligned uniform bottom spacers for VTFETS | Hemanth Jagannathan, Jay William Strane, Eric R. Miller | 2022-02-15 |
| 11244864 | Reducing parasitic capacitance within semiconductor devices | Reinaldo Vega, Alexander Reznicek, Kangguo Cheng | 2022-02-08 |
| 11244861 | Method and structure for forming fully-aligned via | Christopher J. Waskiewicz, Chih-Chao Yang, Huai Huang | 2022-02-08 |
| 11239115 | Partial self-aligned contact for MOL | Veeraraghavan S. Basker, Alexander Reznicek, Junli Wang | 2022-02-01 |
| 11239414 | Physical unclonable function for MRAM structures | Alexander Reznicek, Oscar van der Straten, Koichi Motoyama | 2022-02-01 |
| 11239342 | Vertical transistors having improved control of top source or drain junctions | Kangguo Cheng, Tenko Yamashita, Chun-Chen Yeh | 2022-02-01 |
| 11239165 | Method of forming an interconnect structure with enhanced corner connection | Christopher J. Waskiewicz, Kangguo Cheng, Chih-Chao Yang | 2022-02-01 |
| 11239119 | Replacement bottom spacer for vertical transport field effect transistors | Heng Wu, Jay William Strane, Hemanth Jagannathan, Lan Yu, Tao Li | 2022-02-01 |
| 11233006 | Metallization lines on integrated circuit products | Lars Liebmann, Daniel Chanemougame, Geng Han | 2022-01-25 |
| 11227922 | Sloped epitaxy buried contact | Tao Li, Tsung-Sheng Kang, Alexander Reznicek, Oleg Gluschenkov | 2022-01-18 |
| 11227923 | Wrap around contact process margin improvement with early contact cut | Veeraraghavan S. Basker, Andrew M. Greene, Alexander Reznicek, Yao Yao | 2022-01-18 |
| 11227801 | Formation of contacts for semiconductor devices | Su Chen Fan, Heng Wu, Julien Frougier | 2022-01-18 |
| 11222979 | Field-effect transistor devices with sidewall implant under bottom dielectric isolation | Xin Miao, Alexander Reznicek, Jingyun Zhang | 2022-01-11 |
| 11217692 | Vertical field effect transistor with bottom spacer | Christopher J. Waskiewicz, Jay William Strane, Hemanth Jagannathan | 2022-01-04 |