KM

Koichi Motoyama

IBM: 17 patents #63 of 7,845Top 1%
📍 Clifton Park, NY: #4 of 163 inventorsTop 3%
🗺 New York: #62 of 12,227 inventorsTop 1%
Overall (2022): #2,786 of 548,613Top 1%
17
Patents 2022

Issued Patents 2022

Showing 1–17 of 17 patents

Patent #TitleCo-InventorsDate
11430690 Interconnects having air gap spacers Kenneth Chun Kuen Cheng, Oscar van der Straten, Joseph F. Maniscalco, Chih-Chao Yang 2022-08-30
11410879 Subtractive back-end-of-line vias Chanro Park, Kenneth Chun Kuen Cheng, Chih-Chao Yang 2022-08-09
11380641 Pillar bump with noble metal seed layer for advanced heterogeneous integration Joseph F. Maniscalco, Kenneth Chun Kuen Cheng, Oscar van der Straten, Alexander Reznicek 2022-07-05
11315872 Self-aligned top via Chanro Park, Kenneth Chun Kuen Cheng, Kisik Choi, Chih-Chao Yang 2022-04-26
11289375 Fully aligned interconnects with selective area deposition Chanro Park, Kenneth Chun Kuen Cheng, Chih-Chao Yang 2022-03-29
11282768 Fully-aligned top-via structures with top-via trim Kenneth Chun Kuen Cheng, Brent A. Anderson, Joseph F. Maniscalco 2022-03-22
11276636 Adjustable via dimension and chamfer angle Lawrence A. Clevenger, Gangadhara Raja Muthinti, Cornelius Brown Peethala, Benjamin D. Briggs, Michael Rizzolo 2022-03-15
11270913 BEOL metallization formation Chanro Park, Kenneth Chun Kuen Cheng, Brent A. Anderson, Somnath Ghosh 2022-03-08
11244897 Back end of line metallization Chanro Park, Kenneth Chun Kuen Cheng, Somnath Ghosh, Chih-Chao Yang 2022-02-08
11244853 Fully aligned via interconnects with partially removed etch stop layer Kenneth Chun Kuen Cheng, Chanro Park, Chih-Chao Yang 2022-02-08
11244854 Dual damascene fully aligned via in interconnects Kenneth Chun Kuen Cheng, Chanro Park, Chih-Chao Yang 2022-02-08
11244859 Interconnects having a via-to-line spacer for preventing short circuit events between a conductive via and an adjacent line Cornelius Brown Peethala, Christopher J. Penny, Nicholas Anthony Lanzillo, Lawrence A. Clevenger 2022-02-08
11244860 Double patterning interconnect integration scheme with SAV Shyng-Tsong Chen, Terry A. Spooner, Chih-Chao Yang 2022-02-08
11239414 Physical unclonable function for MRAM structures Ruilong Xie, Alexander Reznicek, Oscar van der Straten 2022-02-01
11239278 Bottom conductive structure with a limited top contact area Chih-Chao Yang, Baozhen Li, Theodorus E. Standaert 2022-02-01
11227792 Interconnect structures including self aligned vias Chih-Chao Yang, Terry A. Spooner, Shyng-Tsong Chen 2022-01-18
11217481 Fully aligned top vias Nicholas Anthony Lanzillo, Somnath Ghosh, Christopher J. Penny, Robert R. Robison, Lawrence A. Clevenger 2022-01-04