Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Willy Rachmady — 33 Patents in 2021

Intel: 30 patents #21 of 5,160Top 1%
Sony: 2 patents #682 of 3,148Top 25%
Google: 1 patents #1,256 of 4,199Top 30%
Beaverton, OR: #3 of 504 inventorsTop 1%
Oregon: #13 of 4,388 inventorsTop 1%
Overall (2021): #631 of 548,734Top 1%
33 Patents 2021

Issued Patents 2021

Showing 1–25 of 33 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11205707 Optimizing gate profile for performance and gate fill Nadia M. Rahhal-Orabi, Tahir Ghani, Matthew V. Metz, Jack T. Kavalieros, Gilbert Dewey +2 more 2021-12-21 $33,282,000
11195924 Broken bandgap contact Benjamin Chu-Kung, Van H. Le, Jack T. Kavalieros, Matthew V. Metz, Ashish Agrawal +1 more 2021-12-07 $28,128,000
11177255 Transistor structures having multiple threshold voltage channel materials Sean T. Ma, Gilbert Dewey, Matthew V. Metz, Harold W. Kennel, Cheng-Ying Huang +3 more 2021-11-16 $23,453,000
11171207 Transistor with isolation below source and drain Cheng-Ying Huang, Matthew V. Metz, Nicholas G. Minutillo, Sean T. Ma, Anand S. Murthy +3 more 2021-11-09 $28,241,000
11171233 Vertical field effect transistors (VFETs) with self-aligned wordlines Ravi Pillarisetty, Abhishek A. Sharma, Van H. Le, Gilbert Dewey 2021-11-09 $28,241,000
11164785 Three-dimensional integrated circuits (3DICs) including upper-level transistors with epitaxial source and drain material Ashish Agrawal, Gilbert Dewey, Cheng-Ying Huang, Anand S. Murthy, Ryan Keech +1 more 2021-11-02 $26,002,000
11164974 Channel layer formed in an art trench Matthew V. Metz, Gilbert Dewey, Nancy Zelick, Harold W. Kennel, Nicholas G. Minutillo +1 more 2021-11-02 $26,002,000
11164747 Group III-V semiconductor devices having asymmetric source and drain structures Sean T. Ma, Gilbert Dewey, Harold W. Kennel, Cheng-Ying Huang, Matthew V. Metz +3 more 2021-11-02 $26,002,000
11152290 Wide bandgap group IV subfin to reduce leakage Benjamin Chu-Kung, Van H. Le, Matthew V. Metz, Jack T. Kavalieros, Ashish Agrawal +1 more 2021-10-19 $36,352,000
11152482 Antiferroelectric gate dielectric transistors and their methods of fabrication Ravi Pillarisetty, Brian S. Doyle, Abhishek A. Sharma, Prashant Majhi, Jack T. Kavalieros +1 more 2021-10-19 $36,352,000
11152396 Semiconductor device having stacked transistors and multiple threshold voltage control Aaron D. Lilak, Rishabh Mehandru, Gilbert Dewey 2021-10-19 $36,352,000
11145763 Vertical switching device with self-aligned contact Ravi Pillarisetty, Prashant Majhi, Seung Hoon Sung, Gilbert Dewey, Abhishek A. Sharma +2 more 2021-10-12 $32,982,000
11145737 Selector devices Abhishek A. Sharma, Ravi Pillarisetty, Van H. Le, Gilbert Dewey 2021-10-12 $32,982,000
11139296 CMOS circuit with vertically oriented n-type transistor and method of providing same Abhishek A. Sharma, Van H. Le, Gilbert Dewey, Ravi Pillarisetty 2021-10-05 $23,463,000
11107890 FINFET transistor having a doped subfin structure to reduce channel to substrate leakage Gilbert Dewey, Matthew V. Metz, Anand S. Murthy, Chandra S. Mohapatra, Tahir Ghani +2 more 2021-08-31 $22,590,000
11101376 Non-planar transition metal dichalcogenide devices Ravi Pillarisetty, Abhishek A. Sharma, Van H. Le, Gilbert Dewey 2021-08-24 $32,164,000
11101270 Techniques and mechanisms for operation of stacked transistors Ravi Pillarisetty, Marko Radosavljevic, Van H. Le, Jack T. Kavalieros 2021-08-24 $32,164,000
11101377 Transistor device with heterogeneous channel structure bodies and method of providing same Abhishek A. Sharma, Gilbert Dewey, Van H. Le, Ravi Pillarisetty 2021-08-24 $32,164,000
11088204 Three terminal selectors for memory applications and their methods of fabrication Ravi Pillarisetty, Abhishek A. Sharma, Van H. Le, Jack T. Kavalieros 2021-08-10 $36,027,000
11081483 CMOS circuit with a group III-nitride transistor and method of providing same Ravi Pillarisetty, Han Wui Then, Marko Radosavljevic, Sansaptak Dasgupta, Van H. Le 2021-08-03 $25,424,000
11075202 Bottom fin trim isolation aligned with top gate for stacked device architectures Aaron D. Lilak, Gilbert Dewey, Patrick Morrow, Rishabh Mehandru 2021-07-27 $27,337,000
11075198 Stacked transistor architecture having diverse fin geometry Aaron D. Lilak, Cheng-Ying Huang, Gilbert Dewey, Rishabh Mehandru 2021-07-27 $27,337,000
11049773 Art trench spacers to enable fin release for non-lattice matched channels Gilbert Dewey, Matthew V. Metz, Sean T. Ma, Cheng-Ying Huang, Tahir Ghani +4 more 2021-06-29 $34,663,000
11031499 Germanium transistor structure with underlap tip to reduce gate induced barrier lowering/short channel effect while minimizing impact on drive current Van H. Le, Matthew V. Metz, Benjamin Chu-Kung, Ashish Agrawal, Jack T. Kavalieros 2021-06-08 $26,946,000
11024714 Nanowire transistor fabrication with hardmask layers Seung Hoon Sung, Seiyon Kim, Kelin J. Kuhn, Jack T. Kavalieros 2021-06-01 $1,176,000