| 11177255 |
Transistor structures having multiple threshold voltage channel materials |
Sean T. Ma, Willy Rachmady, Gilbert Dewey, Matthew V. Metz, Harold W. Kennel +3 more |
2021-11-16 |
| 11171207 |
Transistor with isolation below source and drain |
Willy Rachmady, Matthew V. Metz, Nicholas G. Minutillo, Sean T. Ma, Anand S. Murthy +3 more |
2021-11-09 |
| 11164785 |
Three-dimensional integrated circuits (3DICs) including upper-level transistors with epitaxial source and drain material |
Ashish Agrawal, Gilbert Dewey, Willy Rachmady, Anand S. Murthy, Ryan Keech +1 more |
2021-11-02 |
| 11164747 |
Group III-V semiconductor devices having asymmetric source and drain structures |
Sean T. Ma, Gilbert Dewey, Willy Rachmady, Harold W. Kennel, Matthew V. Metz +3 more |
2021-11-02 |
| 11164974 |
Channel layer formed in an art trench |
Willy Rachmady, Matthew V. Metz, Gilbert Dewey, Nancy Zelick, Harold W. Kennel +1 more |
2021-11-02 |
| 11075198 |
Stacked transistor architecture having diverse fin geometry |
Aaron D. Lilak, Gilbert Dewey, Willy Rachmady, Rishabh Mehandru |
2021-07-27 |
| 11049773 |
Art trench spacers to enable fin release for non-lattice matched channels |
Gilbert Dewey, Matthew V. Metz, Sean T. Ma, Tahir Ghani, Anand S. Murthy +4 more |
2021-06-29 |
| 10892335 |
Device isolation by fixed charge |
Sean T. Ma, Willy Rachmady, Gilbert Dewey, Aaron D. Lilak, Justin R. Weber +5 more |
2021-01-12 |