| 11205707 |
Optimizing gate profile for performance and gate fill |
Nadia M. Rahhal-Orabi, Tahir Ghani, Willy Rachmady, Matthew V. Metz, Jack T. Kavalieros +2 more |
2021-12-21 |
$33,282,000 |
| 11189700 |
Fabrication of wrap-around and conducting metal oxide contacts for IGZO non-planar devices |
Van H. Le, Rafael Rios, Jack T. Kavalieros, Marko Radosavljevic |
2021-11-30 |
$30,212,000 |
| 11183594 |
Dual gate control for trench shaped thin film transistors |
Abhishek A. Sharma, Van H. Le, Jack T. Kavalieros, Shriram Shivaraman, Benjamin Chu-Kung +2 more |
2021-11-23 |
$33,627,000 |
| 11177255 |
Transistor structures having multiple threshold voltage channel materials |
Sean T. Ma, Willy Rachmady, Matthew V. Metz, Harold W. Kennel, Cheng-Ying Huang +3 more |
2021-11-16 |
$23,453,000 |
| 11171207 |
Transistor with isolation below source and drain |
Willy Rachmady, Cheng-Ying Huang, Matthew V. Metz, Nicholas G. Minutillo, Sean T. Ma +3 more |
2021-11-09 |
$28,241,000 |
| 11171243 |
Transistor structures with a metal oxide contact buffer |
Abhishek A. Sharma, Van H. Le, Jack T. Kavalieros, Shriram Shivaraman, Seung Hoon Sung +4 more |
2021-11-09 |
$28,241,000 |
| 11171233 |
Vertical field effect transistors (VFETs) with self-aligned wordlines |
Ravi Pillarisetty, Abhishek A. Sharma, Van H. Le, Willy Rachmady |
2021-11-09 |
$28,241,000 |
| 11164785 |
Three-dimensional integrated circuits (3DICs) including upper-level transistors with epitaxial source and drain material |
Ashish Agrawal, Cheng-Ying Huang, Willy Rachmady, Anand S. Murthy, Ryan Keech +1 more |
2021-11-02 |
$26,002,000 |
| 11164974 |
Channel layer formed in an art trench |
Willy Rachmady, Matthew V. Metz, Nancy Zelick, Harold W. Kennel, Nicholas G. Minutillo +1 more |
2021-11-02 |
$26,002,000 |
| 11164747 |
Group III-V semiconductor devices having asymmetric source and drain structures |
Sean T. Ma, Willy Rachmady, Harold W. Kennel, Cheng-Ying Huang, Matthew V. Metz +3 more |
2021-11-02 |
$26,002,000 |
| 11152482 |
Antiferroelectric gate dielectric transistors and their methods of fabrication |
Ravi Pillarisetty, Brian S. Doyle, Abhishek A. Sharma, Prashant Majhi, Willy Rachmady +1 more |
2021-10-19 |
$36,352,000 |
| 11152514 |
Multi-layer crystalline back gated thin film transistor |
Van H. Le, Abhishek A. Sharma, Kent Millard, Jack T. Kavalieros, Shriram Shivaraman +6 more |
2021-10-19 |
$36,352,000 |
| 11152396 |
Semiconductor device having stacked transistors and multiple threshold voltage control |
Aaron D. Lilak, Rishabh Mehandru, Willy Rachmady |
2021-10-19 |
$36,352,000 |
| 11145739 |
Field effect transistors with a gated oxide semiconductor source/drain spacer |
Rafael Rios, Van H. Le, Jack T. Kavalieros |
2021-10-12 |
$32,982,000 |
| 11145763 |
Vertical switching device with self-aligned contact |
Ravi Pillarisetty, Prashant Majhi, Seung Hoon Sung, Willy Rachmady, Abhishek A. Sharma +2 more |
2021-10-12 |
$32,982,000 |
| 11145737 |
Selector devices |
Abhishek A. Sharma, Ravi Pillarisetty, Van H. Le, Willy Rachmady |
2021-10-12 |
$32,982,000 |
| 11139296 |
CMOS circuit with vertically oriented n-type transistor and method of providing same |
Abhishek A. Sharma, Van H. Le, Willy Rachmady, Ravi Pillarisetty |
2021-10-05 |
$23,463,000 |
| 11107890 |
FINFET transistor having a doped subfin structure to reduce channel to substrate leakage |
Matthew V. Metz, Willy Rachmady, Anand S. Murthy, Chandra S. Mohapatra, Tahir Ghani +2 more |
2021-08-31 |
$22,590,000 |
| 11101376 |
Non-planar transition metal dichalcogenide devices |
Ravi Pillarisetty, Abhishek A. Sharma, Van H. Le, Willy Rachmady |
2021-08-24 |
$32,164,000 |
| 11101377 |
Transistor device with heterogeneous channel structure bodies and method of providing same |
Abhishek A. Sharma, Van H. Le, Willy Rachmady, Ravi Pillarisetty |
2021-08-24 |
$32,164,000 |
| 11075198 |
Stacked transistor architecture having diverse fin geometry |
Aaron D. Lilak, Cheng-Ying Huang, Willy Rachmady, Rishabh Mehandru |
2021-07-27 |
$27,337,000 |
| 11075202 |
Bottom fin trim isolation aligned with top gate for stacked device architectures |
Aaron D. Lilak, Willy Rachmady, Patrick Morrow, Rishabh Mehandru |
2021-07-27 |
$27,337,000 |
| 11049773 |
Art trench spacers to enable fin release for non-lattice matched channels |
Matthew V. Metz, Sean T. Ma, Cheng-Ying Huang, Tahir Ghani, Anand S. Murthy +4 more |
2021-06-29 |
$34,663,000 |
| 11031503 |
Non-planar gate thin film transistor |
Abhishek A. Sharma, Van H. Le, Rafael Rios, Jack T. Kavalieros, Yih Wang +1 more |
2021-06-08 |
$26,946,000 |
| 11031482 |
Gate electrode having a capping layer |
Mark L. Doczy, Suman Datta, Justin K. Brask, Matthew V. Metz |
2021-06-08 |
$26,946,000 |