Issued Patents 2021
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11189724 | Method of forming a top epitaxy source/drain structure for a vertical transistor | Dexin Kong, Kangguo Cheng | 2021-11-30 |
| 11183593 | Three-dimensional field effect device | Huimei Zhou, Su Chen Fan, Peng Xu, Nicolas Loubet | 2021-11-23 |
| 11183583 | Vertical transport FET with bottom source and drain extensions | Pietro Montanini | 2021-11-23 |
| 11183427 | Differing device characteristics on a single wafer by selective etch | Huimei Zhou, Gen Tsutsui, Ruqiang Bao | 2021-11-23 |
| 11164947 | Wrap around contact formation for VTFET | Heng Wu, Ruilong Xie, Lan Yu | 2021-11-02 |
| 11164958 | Nanosheet transistor having a strained channel with strain-preserving multi-segmented source/drain regions | Nicolas Loubet, Zhenxing Bi, Richard A. Conti | 2021-11-02 |
| 11145555 | Gate-last process for vertical transport field-effect transistor | Choonghyun Lee, Hemanth Jagannathan | 2021-10-12 |
| 11088279 | Channel strain formation in vertical transport FETS with dummy stressor materials | Choonghyun Lee, Kangguo Cheng, Juntao Li | 2021-08-10 |
| 11088280 | Transistor and method of forming same | Veeraraghavan S. Basker, Nicolas L. Breil, Oleg Gluschenkov, Alexander Reznicek | 2021-08-10 |
| 11069809 | Soi FinFET fins with recessed fins and epitaxy in source drain region | Alexander Reznicek, Veeraraghavan S. Basker, Nicolas L. Breil, Oleg Gluschenkov | 2021-07-20 |
| 11063147 | Forming bottom source and drain extension on vertical transport FET (VTFET) | Kangguo Cheng, Juntao Li, Choonghyun Lee | 2021-07-13 |
| 11011624 | Vertical transport field-effect transistor (VFET) with dual top spacer | Michael P. Belyansky, Choonghyun Lee | 2021-05-18 |
| 10985274 | Reduction of top source/drain external resistance and parasitic capacitance in vertical transistors | Choonghyun Lee, Kangguo Cheng, Juntao Li | 2021-04-20 |
| 10971626 | Interface charge reduction for SiGe surface | Devendra K. Sadana, Dechao Guo, Joel P. de Souza, Ruqiang Bao, Stephen W. Bedell +3 more | 2021-04-06 |
| 10971490 | Three-dimensional field effect device | Huimei Zhou, Su Chen Fan, Peng Xu, Nicolas Loubet | 2021-04-06 |
| 10957698 | Reduction of multi-threshold voltage patterning damage in nanosheet device structure | Choonghyun Lee, Kangguo Cheng, Juntao Li | 2021-03-23 |
| 10943835 | Fabrication of silicon germanium channel and silicon/silicon germanium dual channel field-effect transistors | Choonghyun Lee, Kangguo Cheng, Juntao Li | 2021-03-09 |
| 10930567 | Maskless epitaxial growth of phosphorus-doped Si and boron-doped SiGe (Ge) for advanced source/drain contact | Choonghyun Lee, Chun Wing Yeung, Hemanth Jagannathan | 2021-02-23 |
| 10930758 | Space deposition between source/drain and sacrificial layers | Kangguo Cheng, Juntao Li, Choonghyun Lee | 2021-02-23 |
| 10916638 | Vertical fin field effect transistor devices with reduced top source/drain variability and lower resistance | Kangguo Cheng, Choonghyun Lee, Juntao Li | 2021-02-09 |
| 10916633 | Silicon germanium FinFET with low gate induced drain leakage current | Kangguo Cheng, Choonghyun Lee, Juntao Li | 2021-02-09 |
| 10910494 | Method and structure for forming vertical transistors with various gate lengths | Kangguo Cheng, Choonghyun Lee, Juntao Li | 2021-02-02 |
| 10903339 | Vertical transport FET devices having a sacrificial doped layer | Choonghyun Lee, Kangguo Cheng, Juntao Li | 2021-01-26 |
| 10892368 | Nanosheet transistor having abrupt junctions between the channel nanosheets and the source/drain extension regions | Choonghyun Lee, Kangguo Cheng, Juntao Li | 2021-01-12 |
| 10886403 | Close proximity and lateral resistance reduction for bottom source/drain epitaxy in vertical transistor devices | Alexander Reznicek, Jingyun Zhang, Xin Miao | 2021-01-05 |