Issued Patents 2017
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9842810 | Tiled-stress-alleviating pad structure | Ekta Misra, Krishna R. Tunga | 2017-12-12 |
| 9824925 | Flip chip alignment mark exposing method enabling wafer level underfill | Kevin S. Petrarca, Nicholas A. Polomoff, Katsuyuki Sakuma | 2017-11-21 |
| 9818637 | Device layer transfer with a preserved handle wafer section | Anthony K. Stamper, John A. Fitzsimmons, Mark D. Jaffe, Randy L. Wolf | 2017-11-14 |
| 9812359 | Thru-silicon-via structures | Fen Chen, Carole D. Graas, Xiao Hu Liu | 2017-11-07 |
| 9806025 | SOI wafers with buried dielectric layers to prevent Cu diffusion | Anthony K. Stamper, John A. Fitzsimmons | 2017-10-31 |
| 9728450 | Insulating a via in a semiconductor substrate | Jennifer A. Oakley, Kevin S. Petrarca, Nicole R. Reardon, Andrew H. Simon | 2017-08-08 |
| 9728506 | Strain engineering devices using partial depth films in through-substrate vias | Joyce C. Liu, Jennifer A. Oakley | 2017-08-08 |
| 9673095 | Protected through semiconductor via (TSV) | Jennifer A. Oakley, Kevin S. Petrarca, Richard P. Volant | 2017-06-06 |
| 9671215 | Wafer to wafer alignment | John A. Fitzsimmons, Spyridon Skordas | 2017-06-06 |
| 9673176 | Metal to metal bonding for stacked (3D) integrated circuits | Tien-Jen Cheng, John A. Fitzsimmons | 2017-06-06 |
| 9666563 | Metal to metal bonding for stacked (3D) integrated circuits | Tien-Jen Cheng, John A. Fitzsimmons | 2017-05-30 |
| 9653432 | Metal to metal bonding for stacked (3D) integrated circuits | Tien-Jen Cheng, John A. Fitzsimmons | 2017-05-16 |
| 9653431 | Metal to metal bonding for stacked (3D) integrated circuits | Tien-Jen Cheng, John A. Fitzsimmons | 2017-05-16 |
| 9633925 | Visualization of alignment marks on a chip covered by a pre-applied underfill | Katsuyuki Sakuma, Jae-Woong Nah | 2017-04-25 |
| 9553054 | Strain detection structures for bonded wafers and chips | John A. Fitzsimmons, Erdem Kaltalioglu, Wei Lin, Spyridon Skordas, Kevin R. Winstel | 2017-01-24 |
| 9536784 | Integrated circuit (IC) chips with through silicon vias (TSV) and method of forming the IC | Andrew J. Martin, Jennifer A. Oakley | 2017-01-03 |
| 9536829 | Programmable electrical fuse in keep out zone | Timothy D. Sullivan, Ping-Chuan Wang, Lijuan Zhang | 2017-01-03 |