Issued Patents 2017
Showing 226–250 of 370 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9659931 | Fin cut on sit level | Ali Khakifirooz, Alexander Reznicek, Tenko Yamashita | 2017-05-23 |
| 9659823 | Highly scaled tunnel FET with tight pitch and method to fabricate same | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-05-23 |
| 9659779 | Method and structure for enabling high aspect ratio sacrificial gates | Ryan O. Jung, Fee Li Lie, Jeffrey C. Shearer, John R. Sporre, Sean Teehan | 2017-05-23 |
| 9650242 | Multi-faced component-based electromechanical device | Qing Cao, Zhengwen Li, Fei Liu | 2017-05-16 |
| 9653695 | Transistor device with vertical carbon nanotube (CNT) arrays or non-vertical tapered CNT arrays | Qing Cao, Zhengwen Li, Fei Liu, Zhen Zhang | 2017-05-16 |
| 9653602 | Tensile and compressive fins for vertical field effect transistors | Xin Miao, Wenyu Xu, Chen Zhang | 2017-05-16 |
| 9653580 | Semiconductor device including strained finFET | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-05-16 |
| 9653575 | Vertical transistor with a body contact for back-biasing | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2017-05-16 |
| 9653541 | Structure and method to make strained FinFET with improved junction capacitance and low leakage | Bruce B. Doris, Ali Khakifirooz, Darsen D. Lu, Alexander Reznicek, Kern Rim | 2017-05-16 |
| 9653480 | Nanosheet capacitor | Juntao Li, Geng Wang, Qintao Zhang | 2017-05-16 |
| 9653458 | Integrated device with P-I-N diodes and vertical field effect transistors | Xin Miao, Wenyu Xu, Chen Zhang | 2017-05-16 |
| 9653456 | MIM capacitor formation in RMG module | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2017-05-16 |
| 9653362 | Complementary heterogeneous MOSFET using global SiGe substrate and hard-mask memorized germanium dilution for nFET | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-05-16 |
| 9653359 | Bulk fin STI formation | Juntao Li, Xin Miao | 2017-05-16 |
| 9653289 | Fabrication of nano-sheet transistors with different threshold voltages | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-05-16 |
| 9653285 | Double aspect ratio trapping | Bruce B. Doris, Ali Khakifirooz, Alexander Reznicek | 2017-05-16 |
| 9646832 | Porous fin as compliant medium to form dislocation-free heteroepitaxial films | Keith E. Fogel, Jeehwan Kim, Devendra K. Sadana | 2017-05-09 |
| 9647123 | Self-aligned sigma extension regions for vertical transistors | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-05-09 |
| 9647120 | Vertical FET symmetric and asymmetric source/drain formation | Zhenxing Bi, Juntao Li, Peng Xu | 2017-05-09 |
| 9647113 | Strained FinFET by epitaxial stressor independent of gate pitch | Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek, Charan V. Surisetty | 2017-05-09 |
| 9647112 | Fabrication of strained vertical P-type field effect transistors by bottom condensation | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-05-09 |
| 9647093 | Fin cut for taper device | Ruilong Xie, Tenko Yamashita | 2017-05-09 |
| 9640667 | III-V vertical field effect transistors with tunable bandgap source/drain regions | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-05-02 |
| 9640436 | MOSFET with asymmetric self-aligned contact | Xin Miao, Ruilong Xie, Tenko Yamashita | 2017-05-02 |
| 9633908 | Method for forming a semiconductor structure containing high mobility semiconductor channel materials | Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2017-04-25 |