Issued Patents All Time
Showing 51–75 of 85 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8528802 | Apparatus and method of substrate to substrate bonding for three dimensional (3D) IC interconnects | Chen-Hua Yu, Wen-Chih Chiou | 2013-09-10 |
| 8500182 | Vacuum wafer carriers for strengthening thin wafers | Ku-Feng Yang, Jing-Cheng Lin, Wen-Chih Chiou, Chen-Hua Yu | 2013-08-06 |
| 8486823 | Methods of forming through via | Wen-Chih Chiou, Chen-Hua Yu, Jung-Chih Hu | 2013-07-16 |
| 8441136 | Protection layer for adhesive material at wafer edge | Wen-Chih Chiou, Shau-Lin Shue | 2013-05-14 |
| 8432038 | Through-silicon via structure and a process for forming the same | Yung-Chi Lin, Wen-Chih Chiou | 2013-04-30 |
| 8405225 | Three-dimensional integrated circuits with protection layers | Chen-Hua Yu, Wen-Chih Chiou, Hung-Jung Tu, Ku-Feng Yang | 2013-03-26 |
| 8405201 | Through-silicon via structure | Yung-Chi Lin, Shau-Lin Shue | 2013-03-26 |
| 8387674 | Chip on wafer bonder | Chen-Hua Yu, Jui-Pin Hung, Jean Wang, Wen-Chih Chiou | 2013-03-05 |
| 8362593 | Method for stacking semiconductor dies | Ku-Feng Yang, Wen-Chih Chiou, Chen-Hua Yu | 2013-01-29 |
| 8344513 | Barrier for through-silicon via | Chen-Hua Yu, Wen-Chih Chiou | 2013-01-01 |
| 8264077 | Backside metal of redistribution line with silicide layer on through-silicon via of semiconductor chips | Wen-Chih Chiou | 2012-09-11 |
| 8252665 | Protection layer for adhesive material at wafer edge | Wen-Chih Chiou, Shau-Lin Shue | 2012-08-28 |
| 8252682 | Method for thinning a wafer | Ku-Feng Yang, Hsin-Hsien Lu, Chia-Lin Yu, Chu-Sung Shih, Fu-Chi Hsu +1 more | 2012-08-28 |
| 8232140 | Method for ultra thin wafer handling and processing | Ku-Feng Yang, Wen-Chih Chiou, Tsung-Ding Wang | 2012-07-31 |
| 8148826 | Three-dimensional integrated circuits with protection layers | Chen-Hua Yu, Wen-Chih Chiou, Hung-Jung Tu, Ku-Feng Yang | 2012-04-03 |
| 8119500 | Wafer bonding | Ku-Feng Yang, Wen-Chih Chiou, Chen-Hua Yu | 2012-02-21 |
| 8058150 | Particle free wafer separation | Ku-Feng Yang, Jung-Chih Hu, Wen-Chih Chiou, Chen-Hua Yu | 2011-11-15 |
| 8053900 | Through-substrate vias (TSVs) electrically connected to a bond pad design with reduced dishing effect | Chen-Hua Yu, Wen-Chih Chiou | 2011-11-08 |
| 8053277 | Three-dimensional integrated circuits with protection layers | Chen-Hua Yu, Wen-Chih Chiou, Hung-Jung Tu, Ku-Feng Yang | 2011-11-08 |
| 7989318 | Method for stacking semiconductor dies | Ku-Feng Yang, Wen-Chih Chiou, Chen-Hua Yu | 2011-08-02 |
| 7972969 | Method and apparatus for thinning a substrate | Ku-Feng Yang, Wen-Chih Chiou, Kewei Zuo | 2011-07-05 |
| 7960290 | Method of fabricating a semiconductor device | Chen-Hua Yu, Wen-Chih Chiou | 2011-06-14 |
| 7955895 | Structure and method for stacked wafer fabrication | Ku-Feng Yang, Wen-Chih Chiou, Hung-Jung Tu | 2011-06-07 |
| 7956448 | Stacked structures and methods of fabricating stacked structures | Chen-Hua Yu, Wen-Chih Chiou, Jean Wang | 2011-06-07 |
| 7951647 | Performing die-to-wafer stacking by filling gaps between dies | Ku-Feng Yang, Wen-Chih Chiou, Ming-Chung Sung | 2011-05-31 |