Issued Patents All Time
Showing 176–200 of 458 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10403736 | Polysilicon design for replacement gate technology | Kong-Beng Thei, Sheng-Chen Chung, Chiung-Han Yeh, Lee-Wee Teo, Yu-Ying Hsu +1 more | 2019-09-03 |
| 10388531 | Self-aligned insulated film for high-k metal gate device | Jin-Aun Ng, Bao-Ru Young, Maxi Chang, Chih-Tang Peng, Chih-Yang Yeh +8 more | 2019-08-20 |
| 10332882 | Semiconductor device having protective structure over shallow trench isolation region and fabricating method thereof | Wei-Cheng Wu | 2019-06-25 |
| 10304903 | Semiconductor structure | Kuei-Hung Shen, Hsun-Chung Kuang, Cheng-Yuan Tsai, Ru-Liang Lee | 2019-05-28 |
| 10276588 | HKMG high voltage CMOS for embedded non-volatile memory | Wei-Cheng Wu, Ya-Chen Kao, Yi Hsien Lu | 2019-04-30 |
| 10276447 | Semiconductor structures and methods of forming the same | Po-Nien Chen, Bao-Ru Young | 2019-04-30 |
| 10270026 | Multilayered spacer structure for a magnetic tunneling junction and method of manufacturing | Sheng-Huang Huang, Hung Cho Wang | 2019-04-23 |
| 10270025 | Semiconductor structure having magnetic tunneling junction (MTJ) layer | Shih-Chang Liu, Chern-Yow Hsu, Kuei-Hung Shen | 2019-04-23 |
| 10177238 | High-K film apparatus and method | Che-Cheng Chang, Yi-Ren Chen, Chang-Yin Chen, Yi-Jen Chen, Ming Zhu +1 more | 2019-01-08 |
| 10164169 | Memory device having a single bottom electrode layer | Hung Cho Wang, Tong-Chern Ong, Wen-Ting Chu, Yu-Wen Liao, Kuei-Hung Shen +2 more | 2018-12-25 |
| 10164076 | Vertical tunneling field-effect transistor cell and fabricating the same | Cheng-Cheng Kuo, Chi-Wen Liu, Ming Zhu | 2018-12-25 |
| 10163919 | Embedded flash memory device with floating gate embedded in a substrate | Wei-Cheng Wu | 2018-12-25 |
| 10147794 | Split gate memory device and method of fabricating the same | Chang-Ming Wu, Wei-Cheng Wu, Shih-Chang Liu, Chia-Shiung Tsai | 2018-12-04 |
| 10134807 | Structure and formation method of integrated circuit structure | Hung Cho Wang, Wen-Chun You | 2018-11-20 |
| 10134743 | Structure and method for statice random access memory device of vertical tunneling field effect transistor | Bao-Ru Young, Ming Zhu, Wei-Cheng Wu, Yi-Ren Chen | 2018-11-20 |
| 10109790 | Method for manufacturing mixed-dimension and void-free MRAM structure | Jiunyu Tsai, Hung Cho Wang, Tsun Chung Tu | 2018-10-23 |
| 10103253 | Structure and method for vertical tunneling field effect transistor with leveled source and drain | Yi-Ren Chen, Chi-Wen Liu, Chao-Hsiung Wang, Ming Zhu | 2018-10-16 |
| 10084061 | Polysilicon design for replacement gate technology | Kong-Beng Thei, Sheng-Chen Chung, Chiung-Han Yeh, Lee-Wee Teo, Yu-Ying Hsu +1 more | 2018-09-25 |
| 10068945 | Semiconductor structure integrated with magnetic tunneling junction and manufacturing method thereof | Alexander Kalnitsky, Sheng-Haung Huang, Tien-Wei Chiang | 2018-09-04 |
| 10068836 | Metal gate transistor, integrated circuits, systems, and fabrication methods thereof | Chien Chih Ho, Chih-Ping Chao, Hua-Chou Tseng, Chun-Hung Chen, Chia-Yi Su +2 more | 2018-09-04 |
| 10068773 | Contact formation for split gate flash memory | Wei-Cheng Wu, Ya-Chen Kao, Chin-Yi Huang | 2018-09-04 |
| 10050050 | Semiconductor device with metal gate memory device and metal gate logic device and method for manufacturing the same | Wei-Cheng Wu, Ya-Chen Kao | 2018-08-14 |
| 10050047 | Method to improve floating gate uniformity for non-volatile memory device | Chin-Yi Huang, Ya-Chen Kao | 2018-08-14 |
| 10043970 | Determining a characteristic of a monitored layer on an integrated chip | Tien-Wei Chiang, Wen-Chun You | 2018-08-07 |
| 10038137 | MRAM device and method for fabricating the same | Sheng-Haung Huang, Hung Cho Wang, Kuei-Hung Shen, Shy-Jay Lin | 2018-07-31 |