Issued Patents All Time
Showing 151–175 of 260 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9633949 | Copper etching integration scheme | Chih Wei Lu, Hsiang-Huan Lee, Tien-I Bao | 2017-04-25 |
| 9633999 | Method and structure for semiconductor mid-end-of-line (MEOL) process | Chih Wei Lu, Chien-Hua Huang, Hsiang-Ku Shen, Zhao-Cheng Chen | 2017-04-25 |
| 9627206 | Method of double patterning lithography process using plurality of mandrels for integrated circuit applications | Hsin-Chieh Yao, Shau-Lin Shue, Tien-I Bao, Yung-Hsu Wu | 2017-04-18 |
| 9627256 | Integrated circuit interconnects and methods of making same | Cheng-Hsiung Tsai, Bo-Jiun Lin, Hsien-Chang Wu | 2017-04-18 |
| 9627215 | Structure and method for interconnection | Chien-Hua Huang, Cheng-Hsiung Tsai, Cherng-Shiaw Tsai | 2017-04-18 |
| 9614053 | Spacers with rectangular profile and methods of forming the same | Yu-Sheng Chang, Tien-I Bao | 2017-04-04 |
| 9607850 | Self-aligned double spacer patterning process | Cheng-Hsiung Tsai, Yung-Hsu Wu, Tsung-Min Huang, Tien-I Bao, Shau-Lin Shue | 2017-03-28 |
| 9601346 | Spacer-damage-free etching | Tsung-Min Huang, Yung-Hsu Wu | 2017-03-21 |
| 9589890 | Method for interconnect scheme | Hsin-Chieh Yao, Carlos H. Diaz, Cheng-Hsiung Tsai, Chien-Hua Huang, Hsi-Wen Tien +3 more | 2017-03-07 |
| 9576893 | Semiconductor structure and semiconductor fabricating process for the same | Tsung-Min Huang | 2017-02-21 |
| 9576814 | Method of spacer patterning to form a target integrated circuit pattern | Chieh-Han Wu, Cheng-Hsiung Tsai, Ming-Feng Shieh, Ru-Gun Liu, Shau-Lin Shue +1 more | 2017-02-21 |
| 9576851 | Interconnect structure and methods of making same | Tsung-Min Huang, Tsung-Jung Tsai | 2017-02-21 |
| 9570305 | Self-aligned double patterning | Yu-Sheng Chang, Tien-I Bao | 2017-02-14 |
| 9564397 | Interconnect structure and method of forming the same | Cheng-Hsiung Tsai, Hai-Ching Chen, Shau-Lin Shue, Tien-I Bao | 2017-02-07 |
| 9558927 | Wet cleaning method for cleaning small pitch features | Chien-Hua Huang, Tsung-Min Huang | 2017-01-31 |
| 9514979 | Trench formation using horn shaped spacer | Tsung-Min Huang, Yung-Hsu Wu | 2016-12-06 |
| 9502249 | Masking process and structures formed thereby | Tsung-Min Huang | 2016-11-22 |
| 9502261 | Spacer etching process for integrated circuit design | Ru-Gun Liu, Cheng-Hsiung Tsai, Chih-Ming Lai, Chia-Ying Lee, Jyu-Horng Shieh +6 more | 2016-11-22 |
| 9490205 | Integrated circuit interconnects and methods of making same | Cheng-Hsiung Tsai, Tsung-Jung Tsai, Hsiang-Huan Lee, Ming-Han Lee | 2016-11-08 |
| 9490163 | Tapered sidewall conductive lines and formation thereof | Chien-Hua Huang, Hsin-Chieh Yao | 2016-11-08 |
| 9484257 | Semiconductor devices and methods of manufacture thereof | Hsin-Chieh Yao, Tien-I Bao, Shau-Lin Shue | 2016-11-01 |
| 9478430 | Method of semiconductor integrated circuit fabrication | Hsin-Chieh Yao, Cheng-Hsiung Tsai, Tien-I Bao | 2016-10-25 |
| 9466486 | Method for integrated circuit patterning | Ming-Feng Shieh, Ru-Gun Liu, Hung-Chang Hsieh, Tien-I Bao, Shau-Lin Shue | 2016-10-11 |
| 9449839 | Self-assembled monolayer for pattern formation | Tsung-Min Huang, Chien-Hua Huang | 2016-09-20 |
| 9437540 | Additional etching to increase via contact area | Pei-Yi Lin, Shau-Lin Shue | 2016-09-06 |