Issued Patents All Time
Showing 101–125 of 133 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9123420 | 3D non-volatile storage with transistor decoding structure | Masaaki Higashitani | 2015-09-01 |
| 9105468 | Vertical bit line wide band gap TFT decoder | Masaaki Higashitani | 2015-08-11 |
| 9034689 | Non-volatile storage with metal oxide switching element and methods for fabricating the same | Deepak C. Sekar, Franz Kreupl, Chu-Chen Fu | 2015-05-19 |
| 8987046 | Trap passivation in memory cell with metal oxide switching element | Deepak C. Sekar, Franz Kreupl, Raghuveer S. Makala | 2015-03-24 |
| 8956968 | Method for fabricating a metal silicide interconnect in 3D non-volatile memory | Masaaki Higashitani | 2015-02-17 |
| 8951859 | Method for fabricating passive devices for 3D non-volatile memory | Masaaki Higashitani | 2015-02-10 |
| 8946003 | Method of forming transistors with ultra-short gate feature | Hsingya Arthur Wang, Kai-Cheng Chou | 2015-02-03 |
| 8933502 | 3D non-volatile memory with metal silicide interconnect | Masaaki Higashitani | 2015-01-13 |
| 8923048 | 3D non-volatile storage with transistor decoding structure | Masaaki Higashitani | 2014-12-30 |
| 8865535 | Fabricating 3D non-volatile storage with transistor decoding structure | Masaaki Higashitani | 2014-10-21 |
| 8847302 | Vertical NAND device with low capacitance and silicided word lines | Johann Alsmeier | 2014-09-30 |
| 8643142 | Passive devices for 3D non-volatile memory | Masaaki Higashitani | 2014-02-04 |
| 8557654 | Punch-through diode | Andrei Mihnea | 2013-10-15 |
| 8520424 | Composition of memory cell with resistance-switching layers | Franz Kreupl, Abhijit Bandyopadhyay, Yung-Tin Chen, Chu-Chen Fu, Wipul Pemsiri Jayasekara +4 more | 2013-08-27 |
| 8462580 | Memory system with reversible resistivity-switching using pulses of alternatrie polarity | George Samachisa, Roy E. Scheuerlein | 2013-06-11 |
| 8435831 | Non-volatile storage with metal oxide switching element and methods for fabricating the same | Deepak C. Sekar, Franz Kreupl, Raghuveer S. Makala | 2013-05-07 |
| 8355271 | Memory system with reversible resistivity-switching using pulses of alternate polarity | George Samachisa, Roy E. Scheuerlein | 2013-01-15 |
| 8288219 | Method of forming a non-volatile memory cell using off-set spacers | Hsingya Arthur Wang, Kai-Cheng Chou | 2012-10-16 |
| 7969011 | MIIM diodes having stacked structure | Deepak C. Sekar, Tanmay Kumar, Er-Xuan Ping, Xiying Chen | 2011-06-28 |
| 7793238 | Method and apparatus for improving a circuit layout using a hierarchical layout description | Zhiyuan Wu, Min-Hsing Chen, Jane W. Sowards, Michael J. Hart, Min-Fang Ho | 2010-09-07 |
| 7250341 | Flash memory device having poly spacers | Hsingya Arthur Wang, Kai-Cheng Chou | 2007-07-31 |
| 7202134 | Method of forming transistors with ultra-short gate feature | Hsingya Arthur Wang, Kai-Cheng Chou | 2007-04-10 |
| 7160774 | Method of forming polysilicon layers in non-volatile memory | Hsingya Arthur Wang, Kai-Cheng Chou | 2007-01-09 |
| 7154141 | Source side programming | Hsingya Arthur Wang, Yuan Tang, Haike Dong, Ming Sang Kwan | 2006-12-26 |
| 6911370 | Flash memory device having poly spacers | Hsingya Arthur Wang, Kai-Cheng Chou | 2005-06-28 |