Issued Patents All Time
Showing 126–133 of 133 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6876582 | Flash memory cell erase scheme using both source and channel regions | Hsingya Arthur Wang, Kai-Cheng Chou | 2005-04-05 |
| 6849489 | Method for forming transistors with ultra-short gate feature | Hsingya Arthur Wang, Kai-Cheng Chou | 2005-02-01 |
| 6818504 | Processes and structures for self-aligned contact non-volatile memory with peripheral transistors easily modifiable for various technologies and applications | Hsingya Arthur Wang, Kai-Cheng Chou | 2004-11-16 |
| 6812515 | Polysilicon layers structure and method of forming same | Hsingya Arthur Wang, Kai-Cheng Chou | 2004-11-02 |
| 6777741 | Non-volatile memory cells with selectively formed floating gate | Hsingya Arthur Wang, Kai-Cheng Chou | 2004-08-17 |
| 6746906 | Transistor with ultra-short gate feature and method of fabricating the same | Hsingya Arthur Wang, Kai-Cheng Chou | 2004-06-08 |
| 6559008 | Non-volatile memory cells with selectively formed floating gate | Hsingya Arthur Wang, Kai-Cheng Chou | 2003-05-06 |
| 6509237 | Flash memory cell fabrication sequence | Hsingya Arthur Wang, Frank Qian | 2003-01-21 |