Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7793238 | Method and apparatus for improving a circuit layout using a hierarchical layout description | Peter Rabkin, Zhiyuan Wu, Min-Hsing Chen, Jane W. Sowards, Michael J. Hart | 2010-09-07 |
| 7464350 | Method of and circuit for verifying a layout of an integrated circuit device | — | 2008-12-09 |