| 12282721 |
Netlist design for post silicon local clock controller timing improvement |
Michael A. Kazda, Frank J. Musante, Michael H. Wood |
2025-04-22 |
| 11989071 |
Dynamic guard band with timing protection and with performance protection |
Tobias Webel, Alejandro Alberto Cook Lobo, Andrew A. Turner, Christian Jacobi, Eberhard Engler +12 more |
2024-05-21 |
| 11953982 |
Dynamic guard band with timing protection and with performance protection |
Alejandro Alberto Cook Lobo, Andrew A. Turner, Christian Jacobi, Eberhard Engler, Edward C. McCain +10 more |
2024-04-09 |
| 11817697 |
Method to limit the time a semiconductor device operates above a maximum operating voltage |
Adam B. Collura, Michael Romain, William V. Huott, Pawel Owczarczyk, Christian Jacobi +9 more |
2023-11-14 |
| 11501047 |
Error injection for timing margin protection and frequency closure |
Richard F. Rizzolo, Bodo Hoppe, Divya K. Joshi, Paul Jacob Logsdon, Sreekala Anandavally +1 more |
2022-11-15 |
| 10372851 |
Independently projecting a canonical clock |
Nathan C. Buck, Peter C. Elmendorf, Eric A. Foreman, Jeffrey G. Hemmett, Lyle Jackson +3 more |
2019-08-06 |
| 10215804 |
Semiconductor power and performance optimization |
Kirk D. Peterson, Andrew A. Turner |
2019-02-26 |
| 8185371 |
Modeling full and half cycle clock variability |
Adil Bhanji, Jack DiLullo, Prashant D Joshi, Don Richard Rozales, Vern A. Victoria +1 more |
2012-05-22 |
| 8001411 |
Generating a local clock domain using dynamic controls |
William V. Huott, Christian Jacobi, Guenter Mayer, Timothy G. McNamara, Chung-Lung K. Shum +2 more |
2011-08-16 |
| 7882472 |
Method, apparatus, and computer program product for automatically waiving non-compute indications for a timing analysis process |
Nicholas P. Sardino, Christopher M. Carney, Vern A. Victoria |
2011-02-01 |
| 7676779 |
Logic block timing estimation using conesize |
Reinaldo A. Bergamaschi, Brian W. Curran, Prabhakar Kudva, Matthew E. Mariani, Mark D. Mayo +1 more |
2010-03-09 |