MK

Michael A. Kazda

IBM: 10 patents #10,888 of 70,183Top 20%
Overall (All Time): #481,209 of 4,157,543Top 15%
10
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12282721 Netlist design for post silicon local clock controller timing improvement Sean Michael Carey, Frank J. Musante, Michael H. Wood 2025-04-22
11080456 Automated design closure with abutted hierarchy Harald D. Folberth, Paul G. Villarrubia, Stephan Held, Pietro Saccardi 2021-08-03
10831965 Placement of vectorized latches in hierarchical integrated circuit development Harald D. Folberth 2020-11-10
10831967 Local clock buffer controller placement and connectivity Jesse Peter Surprise, Gerald Strevig, III, Shawn Kollesar 2020-11-10
10671791 Dynamic microprocessor gate design tool for area/timing margin control Arjen A. Mets, Lakshmi N. Reddy, Cindy S. Washburn, Nancy Y. Zhou 2020-06-02
10606976 Engineering change order aware global routing Diwesh Pandey, Sven Peyer, Gustavo E. Tellez 2020-03-31
10078722 Dynamic microprocessor gate design tool for area/timing margin control Arjen A. Mets, Lakshmi N. Reddy, Cindy S. Washburn, Nancy Y. Zhou 2018-09-18
9075948 Method of improving timing critical cells for physical design in the presence of local placement congestion Frank J. Musante, Alexander J. Suess 2015-07-07
8635577 Timing refinement re-routing Zhuo Li, Gi-Joon Nam, Ying Zhou 2014-01-21
7581201 System and method for sign-off timing closure of a VLSI chip Pooja M. Kotecha, Adam P. Matheny, Lakshmi N Reddy, Louise H. Trevillyan, Paul G. Villarrubia 2009-08-25