Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8001405 | Self-tuning power management techniques | Gero Dittmann, Indira Nair, Alper Buyuktosunoglu | 2011-08-16 |
| 7676779 | Logic block timing estimation using conesize | Sean Michael Carey, Brian W. Curran, Prabhakar Kudva, Matthew E. Mariani, Mark D. Mayo +1 more | 2010-03-09 |
| 6993740 | Methods and arrangements for automatically interconnecting cores in systems-on-chip | Subhrajit Bhattacharya | 2006-01-31 |
| 6324680 | Synthesis of arrays and records | Stephen John Barnfield, Pradip K. Jha, Rudra Mukherjee, John D. Weaver | 2001-11-27 |