RR

Richard F. Rizzolo

IBM: 17 patents #6,502 of 70,183Top 10%
CS Cadence Design Systems: 1 patents #1,216 of 2,263Top 55%
📍 Poughkeepsie, NY: #225 of 1,613 inventorsTop 15%
🗺 New York: #7,917 of 115,490 inventorsTop 7%
Overall (All Time): #253,165 of 4,157,543Top 7%
18
Patents All Time

Issued Patents All Time

Showing 1–18 of 18 patents

Patent #TitleCo-InventorsDate
11501047 Error injection for timing margin protection and frequency closure Sean Michael Carey, Bodo Hoppe, Divya K. Joshi, Paul Jacob Logsdon, Sreekala Anandavally +1 more 2022-11-15
11105853 Empirical LBIST latch switching and state probability determination Franco Motika, Paul Jacob Logsdon 2021-08-31
10048734 Adaptive power capping in a chip Charles R. Lefurgy, Preetham M. Lobo, Malcolm S. Allen-Ware, Tobias Webel 2018-08-14
9874917 Adaptive power capping in a chip Charles R. Lefurgy, Preetham M. Lobo, Malcolm S. Allen-Ware, Tobias Webel 2018-01-23
9733685 Temperature-aware microprocessor voltage management Charles R. Lefurgy, Karthick Rajamani, Malcolm S. Allen-Ware 2017-08-15
9575529 Voltage droop reduction in a processor Brian W. Curran, Preetham M. Lobo, James D. Warnock, Tobias Webel 2017-02-21
7650535 Array delete mechanisms for shipping a microprocessor with defective arrays Norbert Hagspiel, William V. Huott, Frank Lehnert, Brian R. Prasky, Rolf Sautter 2010-01-19
6971054 Method and system for determining repeatable yield detractors of integrated circuits Raymond J. Kurtulik, Franco Motika 2005-11-29
6751765 Method and system for determining repeatable yield detractors of integrated circuits Rocco E. DeStefano, Joseph Eckelman, Thomas G. Foote, Steven Michnowski, Franco Motika +2 more 2004-06-15
6728914 Random path delay testing methodology Kevin William McCauley, William V. Huott, Mary P. Kusko, Peilin Song, Ulrich Baur +1 more 2004-04-27
6662324 Global transition scan based AC method Franco Motika, Peilin Song, William V. Huott, Ulrich Baur 2003-12-09
6532571 Method to improve a testability analysis of a hierarchical design Richard M. Gabrielson, Kevin William McCauley, Bryan J. Robbins, Joseph M. Swenton 2003-03-11
6490702 Scan structure for improving transition fault coverage and scan diagnostics Peilin Song, Franco Motika, Ulrich Baur 2002-12-03
6453436 Method and apparatus for improving transition fault testability of semiconductor chips Peilin Song 2002-09-17
6442720 Technique to decrease the exposure time of infrared imaging of semiconductor chips for failure analysis Timothy J. Koprowski, Mary P. Kusko, Peilin Song 2002-08-27
5455931 Programmable clock tuning system and method Peter J. Camporese, Patrick J. Meaney, Brian J. O'Leary 1995-10-03
5142167 Encoding for simultaneous switching output noise reduction Joseph L. Temple, III, Charles B. Winn 1992-08-25
4760289 Two-level differential cascode current switch masterslice Edward B. Eichelberger, Stephen E. Bello, Rolf O. Bergenn, William Chu, John A. Ludwig 1988-07-26