Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11461520 | SDD ATPG using fault rules files, SDF and node slack for testing an IC chip | Arvind Chokhani, Santosh Subhaschandra Malagi | 2022-10-04 |
| 6532571 | Method to improve a testability analysis of a hierarchical design | Richard M. Gabrielson, Kevin William McCauley, Richard F. Rizzolo, Bryan J. Robbins | 2003-03-11 |
| 5548715 | Analysis of untestable faults using discrete node sets | William B. Maloney, Robert M. Mesnard | 1996-08-20 |