Issued Patents All Time
Showing 1–25 of 66 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12389607 | Bipolar selector with independently tunable threshold voltages | Sheng-Chih Lai, Chung-Te Lin, Min Cao | 2025-08-12 |
| 12242315 | Thermal management in horizontally or vertically stacked dies | Somvir Dahiya, Stephen H. Gunther, Julien Sebot, Scot Kellar, Joshua Een | 2025-03-04 |
| 12229003 | Memory error detection and correction | Hiroki Noguchi, Yu-Der Chih, Hsueh-Chih Yang, Win-San Khwa | 2025-02-18 |
| 12057402 | Direct bonding in microelectronic assemblies | Aleksandar Aleksov, Adel A. Elsherbini, Shawna M. Liff, Johanna M. Swan, Feras Eid +1 more | 2024-08-06 |
| 11792999 | Bipolar selector with independently tunable threshold voltages | Sheng-Chih Lai, Chung-Te Lin, Min Cao | 2023-10-17 |
| 11762732 | Memory error detection and correction | Hiroki Noguchi, Yu-Der Chih, Hsueh-Chih Yang, Win-San Khwa | 2023-09-19 |
| 11404476 | Bipolar selector with independently tunable threshold voltages | Sheng-Chih Lai, Chung-Te Lin, Min Cao | 2022-08-02 |
| 11204826 | Memory error detection and correction | Hiroki Noguchi, Yu-Der Chih, Hsueh-Chih Yang, Win-San Khwa | 2021-12-21 |
| 11133044 | Interleaved routing for MRAM cell selection | Katherine H. Chiang, Chung-Te Lin, Min Cao | 2021-09-28 |
| 10991756 | Bipolar selector with independently tunable threshold voltages | Sheng-Chih Lai, Chung-Te Lin, Min Cao | 2021-04-27 |
| 10878872 | Random access memory | Kevin X. Zhang | 2020-12-29 |
| 10580107 | Automatic hardware ZLW insertion for IPU image streams | Mauro Cocco, Alessandro Paschina | 2020-03-03 |
| 10558570 | Concurrent accesses of asymmetrical memory sources | Nadav Bonen, Zvika Greenfield | 2020-02-11 |
| 10304418 | Operating system transparent system memory abandonment | Daniel Greenspan, Zvika Greenfield, Israel Diamand, Asaf Rubinstein | 2019-05-28 |
| 10134471 | Hybrid memory architectures | Kumar Chinnaswamy, Erik W. Peter | 2018-11-20 |
| 10079052 | Multiple rank high bandwidth memory | Christopher P. Mozak, Michael Gutzmann, James A. McCall | 2018-09-18 |
| 9983877 | Automatic hardware ZLW insertion for IPU image streams | Mauro Cocco, Alessandro Paschina | 2018-05-29 |
| 9934842 | Multiple rank high bandwidth memory | Christopher P. Mozak, Michael Gutzmann, James A. McCall | 2018-04-03 |
| 9535865 | Interconnection of multiple chips in a package | Thomas P. Thomas, Rajesh Kumar | 2017-01-03 |
| 9143120 | Mechanisms for clock gating | Stanley S. Kulick, Erin Francom, Thomas P. Thomas | 2015-09-22 |
| 9087603 | Method and apparatus for selective DRAM precharge | — | 2015-07-21 |
| 8977811 | Scalable schedulers for memory controllers | Philip Abraham, Stanley S. Kulick | 2015-03-10 |
| 8914568 | Hybrid memory architectures | Kumar Chinnaswamy, Erik W. Peter | 2014-12-16 |
| 8902956 | On-package input/output clustered interface having full and half-duplex modes | Thomas P. Thomas, Stanley S. Kulick | 2014-12-02 |
| 8559190 | Memory systems and method for coupling memory chips | — | 2013-10-15 |