Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12379769 | System, apparatus and method for dynamic thermal distribution of a system on chip | Rolf Kuehnis, Matthew Long | 2025-08-05 |
| 12327775 | Thermal performance in hybrid bonded 3D die stacks | Feras Eid, Adel A. Elsherbini, Johanna M. Swan, Shawna M. Liff, Aleksandar Aleksov | 2025-06-10 |
| 12242315 | Thermal management in horizontally or vertically stacked dies | Somvir Dahiya, Stephen H. Gunther, Randy B. Osborne, Scot Kellar, Joshua Een | 2025-03-04 |
| 11656676 | System, apparatus and method for dynamic thermal distribution of a system on chip | Rolf Kuehnis, Matthew Long | 2023-05-23 |
| 11537375 | Digitally coordinated dynamically adaptable clock and voltage supply apparatus and method | Edward A. Burton, Nasser A. Kurd, Jonathan P. Douglas | 2022-12-27 |
| 11048318 | Reducing microprocessor power with minimal performance impact by dynamically adapting runtime operating configurations using machine learning | Rangeen Basu Roy Chowdhury, Rustam Miftakhutdinov, Stephen J. Tarsa, Gautham Chinya, Eric Kwesi Donkoh | 2021-06-29 |
| 10732973 | Processor to execute shift right merge instructions | William W. Macy, Eric L. Debes, Huy V. Nguyen | 2020-08-04 |
| 10146541 | Processor to execute shift right merge instructions | William W. Macy, Eric L. Debes, Huy V. Nguyen | 2018-12-04 |
| 9218184 | Processor to execute shift right merge instructions | William W. Macy, Eric L. Debes, Huy V. Nguyen | 2015-12-22 |
| 9189238 | Bitstream buffer manipulation with a SIMD merge instruction | Yen-Kuang Chen, William W. Macy, Matthew Holliman, Eric L. Debes, Minerva M. Yeung +1 more | 2015-11-17 |
| 9189237 | Bitstream buffer manipulation with a SIMD merge instruction | Yen-Kuang Chen, William W. Macy, Matthew Holliman, Eric L. Debes, Minerva M. Yeung +1 more | 2015-11-17 |
| 9182985 | Bitstream buffer manipulation with a SIMD merge instruction | Yen-Kuang Chen, William W. Macy, Matthew Holliman, Eric L. Debes, Minerva M. Yeung +1 more | 2015-11-10 |
| 9182987 | Bitstream buffer manipulation with a SIMD merge instruction | Yen-Kuang Chen, William W. Macy, Matthew Holliman, Eric L. Debes, Minerva M. Yeung +1 more | 2015-11-10 |
| 9182988 | Bitstream buffer manipulation with a SIMD merge instruction | Yen-Kuang Chen, William W. Macy, Matthew Holliman, Eric L. Debes, Minerva M. Yeung +1 more | 2015-11-10 |
| 9170815 | Bitstream buffer manipulation with a SIMD merge instruction | Yen-Kuang Chen, William W. Macy, Matthew Holliman, Eric L. Debes, Minerva M. Yeung +1 more | 2015-10-27 |
| 9170814 | Bitstream buffer manipulation with a SIMD merge instruction | Yen-Kuang Chen, William W. Macy, Matthew Holliman, Eric L. Debes, Minerva M. Yeung +1 more | 2015-10-27 |
| 9037889 | Apparatus and method for determining the number of execution cores to keep active in a processor | Avinash N. Ananthakrishnan, Jay D. Schwartz, Stephen H. Gunther, Eric C. Samson | 2015-05-19 |
| 8869294 | Mitigating branch prediction and other timing based side channel attacks | Shay Gueron | 2014-10-21 |
| 8782377 | Processor to execute shift right merge instructions | William W. Macy, Eric L. Debes, Huy V. Nguyen | 2014-07-15 |
| 8745358 | Processor to execute shift right merge instructions | William W. Macy, Eric L. Debes, Huy V. Nguyen | 2014-06-03 |
| 7685212 | Fast full search motion estimation with SIMD merge instruction | William W. Macy, Eric L. Debes | 2010-03-23 |
| 7395302 | Method and apparatus for performing horizontal addition and subtraction | William W. Macy, Eric L. Debes, Mark Buxton, Patrice Roussel, Huy V. Nguyen | 2008-07-01 |
| 7272622 | Method and apparatus for parallel shift right merge of data | William W. Macy, Eric L. Debes, Huy V. Nguyen | 2007-09-18 |