Issued Patents All Time
Showing 25 most recent of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9425325 | Electrically programmable and eraseable memory device | Minh Van Ngo, Alexander H. Nickel, Jeong-Uk Huh | 2016-08-23 |
| 8735960 | High ultraviolet light absorbance silicon oxynitride film for improved flash memory device performance | Minh Van Ngo, Alexander H. Nickel, Sung Jin Kim, Simon S. Chan, Ning Cheng | 2014-05-27 |
| 8633074 | Electrically programmable and erasable memory device and method of fabrication thereof | Minh Van Ngo, Alexander H. Nickel, Jeong-Uk Huh | 2014-01-21 |
| 8415256 | Gap-filling with uniform properties | Alexander H. Nickel, Lu You, Hirokazu Tokuno, Minh Van Ngo, Hieu Pham +2 more | 2013-04-09 |
| 8202810 | Low-H plasma treatment with N2 anneal for electronic memory devices | Alexander H. Nickel, Allen L. Evans, Lu You, Minh Van Ngo, Pei-Yuan Gao +4 more | 2012-06-19 |
| 8026169 | Cu annealing for improved data retention in flash memory devices | Lu You, Alexander H. Nickel, Minh Van Ngo, Hieu Pham, Erik Wilson +4 more | 2011-09-27 |
| 7884030 | Gap-filling with uniform properties | Alexander H. Nickel, Lu You, Hirokazu Tokuno, Minh Van Ngo, Hieu Pham +2 more | 2011-02-08 |
| 7776682 | Ordered porosity to direct memory element formation | Alexander H. Nickel, Suzette K. Pangrle, Steven C. Avanzino, Jeffrey A. Shields, Fei Wang +2 more | 2010-08-17 |
| 7534732 | Semiconductor devices with copper interconnects and composite silicon nitride capping layers | Minh Van Ngo, Erik Wilson, Hieu Pham, Robert A. Huertas, Lu You +2 more | 2009-05-19 |
| 7256499 | Ultra low dielectric constant integrated circuit system | Lu You, Fei Wang, Lynne A. Okada | 2007-08-14 |
| 7208418 | Sealing sidewall pores in low-k dielectrics | Lynne A. Okada, Fei Wang, Lu You | 2007-04-24 |
| 7199416 | Systems and methods for a memory and/or selection element formed within a recess in a metal line | Nicholas H. Tripsas, Jeffrey A. Shields | 2007-04-03 |
| 7169706 | Method of using an adhesion precursor layer for chemical vapor deposition (CVD) copper deposition | Sergey Lopatin, Paul R. Besser, Alline F. Myers, Jeremias D. Romero, Lu You +1 more | 2007-01-30 |
| 7129133 | Method and structure of memory element plug with conductive Ta removed from sidewall at region of memory element film | Steven C. Avanzino | 2006-10-31 |
| 7001840 | Interconnect with multiple layers of conductive material with grain boundary between the layers | Lu You, Fei Wang, Lynne A. Okada | 2006-02-21 |
| 6998337 | Thermal annealing for Cu seed layer enhancement | — | 2006-02-14 |
| 6992004 | Implanted barrier layer to improve line reliability and method of forming same | Paul R. Besser, Matthew S. Buynoski, Pin-Chin Connie Wang, Lu You, Sergey Lopatin +1 more | 2006-01-31 |
| 6979642 | Method of self-annealing conductive lines that separates grain size effects from alloy mobility | Matthew S. Buynoski, Connie P. Wang, Paul R. Besser | 2005-12-27 |
| 6756300 | Method for forming dual damascene interconnect structure | Fei Wang, Jerry Cheng, Lynne A. Okada, Lu You | 2004-06-29 |
| 6664187 | Laser thermal annealing for Cu seedlayer enhancement | Minh Van Ngo | 2003-12-16 |
| 6649034 | Electro-chemical metal alloying for semiconductor manufacturing | Amit P. Marathe, Pin-Chin Connie Wang | 2003-11-18 |
| 6609946 | Method and system for polishing a semiconductor wafer | — | 2003-08-26 |
| 6589408 | Non-planar copper alloy target for plasma vapor deposition systems | Pin-Chin Connie Wang, Paul R. Besser, Sergey Lopatin | 2003-07-08 |
| 6583051 | Method of manufacturing an amorphized barrier layer for integrated circuit interconnects | Sergey Lopatin, Minh Van Ngo | 2003-06-24 |
| 6566248 | Graphoepitaxial conductor cores in integrated circuit interconnects | Pin-Chin Connie Wang | 2003-05-20 |