Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12046581 | Integrated circuit package with glass spacer | Mao Guo, Hyoung Il Kim, Sireesha Gogineni | 2024-07-23 |
| 12027496 | Film in substrate for releasing z stack-up constraint | Jianfeng Hu, Zhicheng Ding, Zhijun Xu | 2024-07-02 |
| 11990395 | Joint connection of corner non-critical to function (NCTF) ball for BGA solder joint reliability (SJR) enhancement | Xiaoying Tang, Zhicheng Ding, Bin Liu, Zhijun Xu | 2024-05-21 |
| 11894344 | Power enhanced stacked chip scale package solution with integrated die attach film | Zhijun Xu, Bin Liu, Zhicheng Ding | 2024-02-06 |
| 11881441 | Stacked die semiconductor package spacer die | Sireesha Gogineni, Andrew Tae Kim, Karissa J. Blue | 2024-01-23 |
| 11848281 | Die stack with reduced warpage | Bin Liu, Zhicheng Ding, Aiping Tan | 2023-12-19 |
| 11830848 | Electronic device package | Zhicheng Ding, Bin Liu, Hyoung Il Kim | 2023-11-28 |
| 11742284 | Interconnect structure fabricated using lithographic and deposition processes | Zhicheng Ding, Bin Liu, Zhijun Xu | 2023-08-29 |
| 11538746 | Vertical bond-wire stacked chip-scale package with application-specific integrated circuit die on stack, and methods of making same | Zhicheng Ding, Bin Liu, Aiping Tan, Li Deng | 2022-12-27 |
| 11393788 | Integrated circuit package with glass spacer | Mao Guo, Hyoung Il Kim, Sireesha Gogineni | 2022-07-19 |
| 11302671 | Power enhanced stacked chip scale package solution with integrated die attach film | Zhijun Xu, Bin Liu, Zhicheng Ding | 2022-04-12 |
| 11081451 | Die stack with reduced warpage | Bin Liu, Zhicheng Ding, Aiping Tan | 2021-08-03 |
| 10991679 | Stair-stacked dice device in a system in package, and methods of making same | Zhicheng Ding, Bin Liu, Aiping Tan, Li Deng | 2021-04-27 |
| 10930622 | Prepackaged stair-stacked memory module in a chip scale system in package, and methods of making same | Zhicheng Ding, Bin Liu, Aiping Tan, Li Deng | 2021-02-23 |
| 10910347 | Method, apparatus and system to interconnect packaged integrated circuit dies | John G. Meyers, Zhicheng Ding, Richard Patten | 2021-02-02 |
| 10872832 | Pre-molded active IC of passive components to miniaturize system in package | Mao Guo, John G. Meyers, Bin Liu, Lingyan L. Tan | 2020-12-22 |
| 10770434 | Stair-stacked dice device in a system in package, and methods of making same | Zhicheng Ding, Bin Liu, Aiping Tan, Li Deng | 2020-09-08 |
| 10727208 | Prepackaged stair-stacked memory module in a chip scale system in package, and methods of making same | Zhicheng Ding, Bin Liu, Aiping Tan, Li Deng | 2020-07-28 |
| 10438916 | Wire bond connection with intermediate contact structure | — | 2019-10-08 |
| 10396055 | Method, apparatus and system to interconnect packaged integrated circuit dies | John G. Meyers, Zhicheng Ding, Richard Patten | 2019-08-27 |
| 10332899 | 3D package having edge-aligned die stack with direct inter-die wire connections | Yi Xu, Florence R. Pon | 2019-06-25 |
| 9859255 | Electronic device package | Jh Yoon, Mao Guo, Richard Patten | 2018-01-02 |
| 9778688 | Flexible system-in-package solutions for wearable devices | Jiamiao Tang, Junfeng Zhao, Michael P. Skinner, Jiun Hann Sir, Bok Eng Cheah +3 more | 2017-10-03 |