Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Stacked die semiconductor package spacer die

Stacked die semiconductor package spacer die

US Patent 11881441 · Granted Jan 23, 2024

Estimated economic value: $52,361,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Chip transfer method and electronic device2025
Integrated circuit package with glass spacer2024
Integrated circuit package with glass spacer2024
Film in substrate for releasing z stack-up constraint2024
Joint connection of corner non-critical to function (NCTF) ball for BGA solder j2024
Power enhanced stacked chip scale package solution with integrated die attach fi2024
Die stack with reduced warpage2023
Pad design for thermal fatigue resistance and interconnect joint reliability2023
Electronic device package2023
Interconnect structure fabricated using lithographic and deposition processes2023
Bowl shaped pad2023
Fabrication of phase change memory cell in integrated circuit2023