Issued Patents All Time
Showing 151–175 of 192 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7772071 | Strained channel transistor and method of fabrication thereof | Yung Fu Chong, Judson R. Holt | 2010-08-10 |
| 7767579 | Protection of SiGe during etch and clean operations | Ashima B. Chakravarti, Renee T. Mo, Shreesh Narasimha, Katsunori Onishi | 2010-08-03 |
| 7759206 | Methods of forming semiconductor devices using embedded L-shape spacers | Young Way Teh, Atul Ajmera | 2010-07-20 |
| 7750429 | Self-aligned and extended inter-well isolation structure | Thomas W. Dyer, Haining Yang | 2010-07-06 |
| 7741658 | Self-aligned super stressed PFET | Yaocheng Liu, Huilong Zhu | 2010-06-22 |
| 7718513 | Forming silicided gate and contacts from polysilicon germanium and structure formed | Huilong Zhu, Wenjuan Zhu | 2010-05-18 |
| 7718500 | Formation of raised source/drain structures in NFET with embedded SiGe in PFET | Yung Fu Chong, Joo-chan Kim, Judson R. Holt | 2010-05-18 |
| 7691690 | Methods for forming dual fully silicided gates over fins of FinFet devices | Huilong Zhu | 2010-04-06 |
| 7674697 | MOSFET with multiple fully silicided gate and method for making the same | Huilong Zhu | 2010-03-09 |
| 7666721 | SOI substrates and SOI devices, and methods for forming the same | Thomas W. Dyer, Haining Yang | 2010-02-23 |
| 7666790 | Silicide gate field effect transistors and methods for fabrication thereof | William K. Henson, Christian Lavoie, Huilong Zhu | 2010-02-23 |
| 7666774 | CMOS structure including dual metal containing composite gates | Huilong Zhu, Dae-Gyu Park, Ying Zhang | 2010-02-23 |
| 7667263 | Semiconductor structure including doped silicon carbon liner layer and method for fabrication thereof | Yaocheng Liu | 2010-02-23 |
| 7646039 | SOI field effect transistor having asymmetric junction leakage | Huilong Zhu, Qingqing Liang | 2010-01-12 |
| 7618866 | Structure and method to form multilayer embedded stressors | Ricky S. Amos, Nivo Rovedo, Henry K. Utomo | 2009-11-17 |
| 7595233 | Gate stress engineering for MOSFET | Yung Fu Chong, Huilong Zhu | 2009-09-29 |
| 7572712 | Method to form selective strained Si using lateral epitaxy | Yung Fu Chong, Judson R. Holt | 2009-08-11 |
| 7566609 | Method of manufacturing a semiconductor structure | Yung Fu Chong, Huilong Zhu | 2009-07-28 |
| 7564081 | finFET structure with multiply stressed gate electrode | Huilong Zhu | 2009-07-21 |
| 7553709 | MOSFET with body contacts | Huilong Zhu | 2009-06-30 |
| 7550330 | Deep junction SOI MOSFET with enhanced edge body contacts | Thomas W. Dyer, Jack A. Mandelman | 2009-06-23 |
| 7541629 | Embedded insulating band for controlling short-channel effect and leakage reduction for DSB process | Huilong Zhu, Haizhou Yin | 2009-06-02 |
| 7504696 | CMOS with dual metal gate | Huilong Zhu, Dae-Gyu Park | 2009-03-17 |
| 7501651 | Test structure of semiconductor device | Min-Chul Sun, Ja-Hum Ku, Brian J. Greene, Manfred Eller, Roman Knoefler | 2009-03-10 |
| 7485516 | Method of ion implantation of nitrogen into semiconductor substrate prior to oxidation for offset spacer formation | Thomas W. Dyer, Jinhong Li | 2009-02-03 |