KO

Katsunori Onishi

IBM: 9 patents #11,918 of 70,183Top 20%
Globalfoundries: 7 patents #504 of 4,424Top 15%
FC Funai Electric Co.: 6 patents #174 of 943Top 20%
IK Inoue Mtp Kabushiki Kaisha: 1 patents #15 of 36Top 45%
MC Macronix International Co.: 1 patents #718 of 1,241Top 60%
📍 Somers, NY: #39 of 237 inventorsTop 20%
🗺 New York: #5,157 of 115,490 inventorsTop 5%
Overall (All Time): #161,589 of 4,157,543Top 4%
25
Patents All Time

Issued Patents All Time

Showing 1–25 of 25 patents

Patent #TitleCo-InventorsDate
11598086 Joint structure for H-beam 2023-03-07
10741668 Short channel and long channel devices Bala Haran, Ruilong Xie, Balaji Kannan, Vimal Kamineni 2020-08-11
10658363 Cut inside replacement metal gate trench to mitigate N-P proximity effect Balaji Kannan, Ayse M. Ozbek, Tao Chu, Bala Haran, Vishal Chhabra +1 more 2020-05-19
10446550 Cut inside replacement metal gate trench to mitigate N-P proximity effect Balaji Kannan, Ayse M. Ozbek, Tao Chu, Bala Haran, Vishal Chhabra +1 more 2019-10-15
10354928 Integration scheme for gate height control and void free RMG fill Suraj K. Patil, Pei Liu, Chih-Chiang Chang 2019-07-16
10242982 Method for forming a protection device having an inner contact spacer and the resulting devices Ruilong Xie, Tek Po Rinus Lee 2019-03-26
10056303 Integration scheme for gate height control and void free RMG fill Suraj K. Patil, Pei Liu, Chih-Chiang Chang 2018-08-21
9761679 Performance optimized gate structures having memory device and logic device, the memory device with silicided source/drain regions that are raised with respect to silicided source/drain regions of the logic device Paul Chang, Jian-Shen Yu 2017-09-12
9735058 Method of forming performance optimized gate structures by silicidizing lowered source and drain regions Paul Chang, Jian-Shen Yu 2017-08-15
9455195 Method of forming performance optimized gate structures by silicidizing lowered source and drain regions Paul Chang, Jian-Shen Yu 2016-09-27
9240482 Asymmetric stressor DRAM Ravi K. Dasaka, Shreesh Narasimha, Ahmed Nayaz Noemaun, Karen A. Nummy, Paul C. Parries +3 more 2016-01-19
9136321 Low energy ion implantation of a junction butting region Shreesh Narasimha, Paul C. Parries, Chengwen Pei, Geng Wang 2015-09-15
7932144 Semiconductor structure and method of forming the structure Yaocheng Liu, Shreesh Narasimha, Kern Rim 2011-04-26
7781239 Semiconductor device defect type determination method and structure Ishtiaq Ahsan, Andrew McKnight, Keith H. Tabakman 2010-08-24
7767579 Protection of SiGe during etch and clean operations Ashima B. Chakravarti, Zhijiong Luo, Renee T. Mo, Shreesh Narasimha 2010-08-03
7714358 Semiconductor structure and method of forming the structure Yaocheng Liu, Shreesh Narasimha, Kern Rim 2010-05-11
7610590 Optical disc apparatus Kazumasa Nasu, Takayuki Murakami, Katsuo Ichinohe, Yasuhiro Nishina, Shinya Yamaguchi +2 more 2009-10-27
7231647 Disk apparatus 2007-06-12
7160771 Forming gate oxides having multiple thicknesses Anthony I. Chou, Michael P. Chudzik, Toshiharu Furukawa, Oleg Gluschenkov, Paul Kirsch +4 more 2007-01-09
6111713 Recording-medium mis-recording preventing mechanism Kunio Sawai, Hiroshi Hamahata, Shigeru Kaneko 2000-08-29
6057979 Magnetic tape cassette with fail-safe inserting apparatus Kunio Sawai, Hiroshi Hamahata, Shigeru Kaneko 2000-05-02
6021018 Loading mechanism for a video cassette Kunio Sawai, Hiroshi Hamahata, Shigeru Kaneko 2000-02-01
5975787 Device for securing a part to a chassis Kunio Sawai, Hiroshi Hamahata, Shigeru Kaneko 1999-11-02
5592000 Non-volatile semiconductor memory device programmable and erasable at low voltage Fuchia Shone 1997-01-07
4690348 Apparatus for winding a sheet-formed article Kenji Watanabe, Hiroshi Kato 1987-09-01